High-frequency chip packages
AssigneeTessera, Inc.
InventorMichael Warner
Life of this patent
Estimating the term…
Abstract
A packaged semiconductor chip includes features such as a chip carrier having a large thermal conductor which can be solder-bonded to a circuit board so as to provide enhanced thermal conductivity to the circuit board and electromagnetic shielding and a conductive enclosure which partially or completely surrounds the packaged chip to provide additional heat dissipation and shielding. The packaged unit may include both an active semiconductor chip and a passive element, desirably in the form of a chip, which includes resistors and capacitors. Inductors may be provided in whole or in part on the chip carrier. A module includes two circuits and an enclosure with a medial wall between the circuits to provide electromagnetic shielding between the circuits.
Claims18
A packaged semiconductor chip comprising:
- (a) a first semiconductor chip having a front face, a rear face, edges bounding said faces and contacts exposed at said front face;
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- (b) a chip carrier having inner and outer surfaces, the inner surface of said chip carrier facing in an upward direction toward said chip, said chip carrier having a plurality of terminals and a metallic thermal conductor having a unitary solder-wettable area exposed at said outer surface, said unitary solder-wettable area having an area larger than the area of each of said terminals, said thermal conductor being at least partially aligned with said chip, at least some of said terminals being electrically connected to at least some of said contacts of said chip.
An assembly including a packaged semiconductor chip, comprising:
- (a) a first semiconductor chip having a front face, a rear face, edges bounding said faces and contacts exposed at said front face;
- (b) a chip carrier having inner and outer surfaces, the inner surface of said chip carrier facing in an upward direction toward said chip, said chip carrier having a plurality of terminals and a metallic thermal conductor exposed at said outer surface, said thermal conductor having area larger than the area of each of said terminals, said thermal conductor being at least partially aligned with said chip, at least some of said terminals being electrically connected to at least some of said contacts of said chip;
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- (c) a circuit panel having contact pads and a thermal conductor mounting, said hip carrier being disposed on said circuit panel with said outer face of said chip carrier facing downwardly toward said circuit panel, said terminals of said chip carrier being connected to said contact pads of said circuit panel, said thermal conductor of said chip carrier being bonded to said thermal conductor mounting of said circuit panel, wherein said front face of said first chip is disposed at about 0.2 mm above said thermal conductor mounting of said circuit panel.
A packaged semiconductor chip comprising:
- (a) a first semiconductor chip having a front face, a rear face, edges bounding said faces and contacts exposed at said front face;
- (b) a chip carrier having inner and outer surfaces, the inner surface of said chip carrier facing in an upward direction toward said chip, said chip carrier having a plurality of terminals and a metallic thermal conductor exposed at said outer surface, said thermal conductor having area larger than the area of each of said terminals, said thermal conductor being at least partially aligned with said chip, at least some of said terminals being electrically connected to at least some of said contacts of said chip;
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- (c) a circuit panel having contact pads and a thermal conductor mounting, said chip carrier being disposed on said circuit panel with said outer face of said chip carrier facing downwardly toward said circuit panel, said terminals of said chip carrier being connected to said contact pads of said circuit panel, said thermal conductor of said chip carrier being bonded to said thermal conductor mounting of said circuit panel at a spacing of between about 25 μm and 50 μm.
Dependencies are inferred from the claim text.