Compact layout for a semiconductor device
AssigneeAnadigics, Inc.
InventorsAli Kiaei, Mehdi Frederick Soltan, Ali Rajaei, Hamid Reza Rategh
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Abstract
A semiconductor device includes a semiconductor substrate, an electrode disposed on an upper surface of the substrate, and a set of one or more transistor element(s) disposed on the upper surface of the substrate. The set of transistor element(s) compactly surrounds the electrode with a threshold distance. In one embodiment, the set also compactly surrounds a via hole. In another, the element(s) comprises a bipolar junction transistor that has an aggregate emitter length of not less than 10 microns. In still another embodiment, the device is coupled to a RF circuit for power amplification.
Claims9
A semiconductor device, comprising:
- a semiconductor substrate having a surface and defining a via hole therein through the surface;
- a first electrode over the surface of the substrate;
- a set of one or more transistor element(s) over the surface of the substrate, each transistor element in the set comprising at least one contact that is electrically connected to the first electrode, wherein the set of transistor element(s) compactly surrounds the first electrode and the via hole;
- a first and a second feed each having a respective tree-structure for balancing a respective feed signal, each transistor element having at least one contact that is electrically connected to the second feed;
- an insulating layer disposed on the first electrode;
- a third electrode disposed on the insulating layer and
- a metal connection that electrically connects a second electrode to the third electrode, each transistor element having at least one contact that is electrically connected to the second electrode.
Dependencies are inferred from the claim text.