Semiconductor device with high mobility and high speed
AssigneeFujitsu Limited
InventorsTakashi Mimura, Keiji Ikeda
Life of this patent
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Abstract
The semiconductor device comprises a semiconductor layer 18 formed on an insulation layer 16, a gate electrode 22 formed on the semiconductor layer with a gate insulation film 20 formed therebetween, a source/drain region 24 formed on the semiconductor layer on both sides of the gate electrode, and a semiconductor region 14 buried in the insulation layer 16 in a region below the gate electrode.
Claims13
A semiconductor device comprising:
- a semiconductor layer formed on an insulation layer;
- a gate electrode formed on the semiconductor layer with a gate insulation film formed therebetween;
- a source/drain region formed in the semiconductor layer on both sides of the gate electrode;
- and
- a semiconductor region buried in the insulation layer in a region below the gate electrode, wherein
- the semiconductor layer is formed of Si1-XGeX where a composition ratio X is 0<X≦1, and
- the semiconductor region is formed of Si.
A semiconductor device comprising:
- a semiconductor layer formed on an insulation layer;
- a gate electrode formed on the semiconductor layer with a gate insulation film formed therebetween;
- a source/drain region formed in the semiconductor layer on both sides of the gate electrode;
- and
- a semiconductor region buried in the insulation layer in a region below the gate electrode, wherein
- the semiconductor layer is formed of Si1-XGeX where a composition ratio X is 0<X≦1, and
- the semiconductor region is formed of Si1-XGeX where a composition ratio X is 0<X≦1.
A semiconductor device comprising:
- a semiconductor layer formed on an insulation layer;
- a gate electrode formed on the semiconductor layer with a gate insulation film formed therebetween;
- a source/drain region formed in the semiconductor layer on both sides of the gate electrode;
- and
- a semiconductor region buried in the insulation layer in a region below the gate electrode, wherein
- the semiconductor layer is formed of Si, and
- the semiconductor region is formed of Si1-XGeX where a composition ratio X is 0<X≦1.
A semiconductor device comprising:
- a semiconductor layer formed on an insulation layer;
- a gate electrode formed on the semiconductor layer with a gate insulation film formed therebetween;
- a source/drain region formed in the semiconductor layer on both sides of the gate electrode;
- and
- a semiconductor region buried in the insulation layer in a region below the gate electrode, wherein
- semiconductor layer is formed of an n type semiconductor or a p type semiconductor, and
- the semiconductor region is formed of an intrinsic semiconductor.
A semiconductor device comprising:
- a semiconductor layer formed on an insulation layer;
- a gate electrode formed on the semiconductor layer with a gate insulation film formed therebetween;
- a source/drain region formed in the semiconductor layer on both sides of the gate electrode;
- and
- a semiconductor region buried in the insulation layer in a region below the gate electrode, wherein
- the semiconductor layer is formed of an intrinsic semiconductor, and
- the semiconductor region is formed of an intrinsic semiconductor.
A semiconductor device comprising:
- a semiconductor layer formed on an insulation layer;
- a gate electrode formed on the semiconductor layer with a gate insulation film formed therebetween;
- a source/drain region formed in the semiconductor layer on both sides of the gate electrode;
- and
- a semiconductor region buried in the insulation layer in a region below the gate electrode, wherein
- the source/drain region is formed of a metal or a metal silicide.
A semiconductor device comprising:
- a semiconductor layer formed on an insulation layer;
- a gate electrode formed on the semiconductor layer with a gate insulation film formed therebetween;
- a source/drain region formed in the semiconductor layer on both sides of the gate electrode;
- and
- a semiconductor region buried in the insulation layer in a region below the gate electrode, wherein
- the semiconductor layer and the semiconductor region are formed of Si, wherein
- the semiconductor layer and semiconductor region are formed of Si, wherein
- the source/drain region is formed of a metal or a metal silicide.
Dependencies are inferred from the claim text.