Wiring substrate having position information
AssigneeShinko Electric Industries Co., Ltd.
InventorsYukio Sato, Akihiro Oku, Masayoshi Aoki
Life of this patent
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Abstract
A method for producing a wiring board for a semiconductor package having a base substrate with first and second surfaces; a wiring layer including wiring patterns formed on at least one of the first and second surfaces; a plurality of semiconductor element mounting areas formed on the surface of the base substrate on which the wiring layer is formed; and individual patterns as position information formed for the respective semiconductor element mounting areas, the individual patterns having a different shape for each of the respective semiconductor element mounting areas. The individual patterns as position information are formed on peripheral regions of the respective semiconductor element mounting areas.
Claims8
A process of manufacturing a wiring board of semiconductor package, the process comprising:
- forming a wiring layer of wiring patterns on at least one of first and second surfaces of a base substrate;
- and
- simultaneously forming individual patterns as position information for respective semiconductor element mounting areas on the surface of the base substrate on which the wiring layer is formed, a shape of the individual patterns in one of the semiconductor element mounting areas being different than a shape of the individual patterns in any other of the semiconductor element mounting areas.
A process of manufacturing a wiring board of semiconductor package, the process comprising:
- forming at least two wiring layers with respective wiring patterns on at least one of first and second surfaces of a base substrate via respective insulating layers;
- and
- forming individual patterns as position information provided for the respective semiconductor element mounting areas, a shape of the individual patterns in one of the semiconductor element mounting areas being different than a shape of the individual patterns in any other of the semiconductor element mounting areas.
A process of manufacturing a semiconductor device comprising:
- forming a wiring layer of wiring patterns on at least one of first and second surfaces of a base substrate;
- simultaneously forming individual patterns as position information for respective semiconductor element mounting areas on the surface of the base substrate on which the wiring layer is formed, a shape of the individual patterns in one of the semiconductor element mounting areas being different than a shape of the individual patterns in any other of the semiconductor element mounting areas;
- mounting a plurality of semiconductor chips each having electrodes on the substrate;
- electrically connecting the electrodes of the semiconductor chips to the wiring pattern with bonding wires;
- sealing the semiconductor chips and the bonding wires;
- adhering external connecting terminals on the opposite surface of the substrate on which the individual patterns as position information are provided;
- and
- separating respective units of semiconductor devices from the substrate.
A process of manufacturing a semiconductor package, the process comprising:
- forming at least two wiring layers with respective wiring patterns formed on at least one of first and second surfaces of a base substrate via respective insulating layers;
- forming individual patterns as position information for the respective semiconductor element mounting areas, a shape of the individual patterns in one of the semiconductor element mounting areas being different than a shape of the individual patterns in any other of the semiconductor element mounting areas;
- mounting a plurality of semiconductor chips each having electrodes on the substrate;
- electrically connecting the electrodes of the semiconductor chips to the wiring pattern with bonding wires;
- sealing the semiconductor chips and the bonding wires;
- adhering external connecting terminals on the opposite surface of the substrate on which the individual patterns as position information are provided;
- and
- separating respective units of semiconductor devices from the substrate.
Dependencies are inferred from the claim text.