Method for fabricating metal-oxide semiconductor transistor

A method for fabricating a metal-oxide semiconductor (MOS) transistor, comprising the steps of:

• forming sequentially a first oxide layer and a first nitride layer on a substrate;
• etching selectively the first nitride layer and the first oxide layer to expose a portion of the substrate;
• etching the exposed portion of the substrate with a predetermined thickness to form a first trench at a device isolation region;
• depositing a device isolation oxide layer on an entire surface of the substrate in such a manner that the device isolation layer is filled into the first trench;
• performing a chemical mechanical polishing (CMP) process until the first nitride layer is exposed;
• etching selectively the first nitride layer except for the exposed portion of the first nitride layer and the first oxide layer with use of a mask pattern for forming a predetermined gate electrode;
• etching an exposed portion of the substrate with a predetermined thickness to form a second trench defining a channel region and clean the trench;
• forming a buffer oxide layer on the substrate;
• performing a channel ion-implantation technique to the second trench defining the channel region;
• removing the first nitride layer and the buffer oxide layer and growing a gate oxide layer on lateral sides and a bottom side of the exposed portion of the substrate;
• depositing a polysilicon layer for forming a gate electrode on an entire surface of the substrate;
• performing a CMP process to the polysilicon layer for forming the gate electrode until the device isolation oxide layer is exposed;
• depositing a tungsten nitride barrier layer, a tungsten layer for forming a gate electrode and a second nitride layer on an entire surface of the substrate;
• patterning the second nitride layer, the tungsten layer for forming the gate electrode and the tungsten nitride barrier layer into a predetermined gate electrode pattern;
• forming a lateral nitride layer at lateral sides of the patterned tungsten nitride barrier layer and the tungsten layer for forming the gate electrode;
• and
• performing a selective oxidation process to form and grow a selective oxide layer on the polysilicon layer for forming the gate electrode encompassed by the substrate and the lateral nitride layer in order to recover any damage generated by the etch process.