Semiconductor device with elevated source/drain structure and its manufacture method
AssigneeFujitsu Limited
InventorToshifumi Mori
Life of this patent
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AssigneeFujitsu Limited
InventorToshifumi Mori
Estimating the term…
A gate electrode is formed over a partial surface area of a semiconductor substrate, with a gate insulating film being interposed therebetween. A first semiconductor film is formed over the semiconductor substrate on both sides of the gate electrode, the first semiconductor film being spaced apart from the gate electrode. An impurity diffusion region is formed in each of the first semiconductor films. An extension region is formed in the surface layer of the semiconductor substrate on both sides of the gate electrode. The extension region is doped with impurities of the same conductivity type as the impurity diffusion region and being connected to a corresponding one of the impurity diffusion regions. Sidewall spacers are formed on the sidewalls of the gate electrode, the sidewall spacers extending beyond edges of the first semiconductor films on the gate electrode side and covering partial surfaces of the first semiconductor films.
A method of manufacturing a semiconductor device, comprising steps of:
Dependencies are inferred from the claim text.