Method of fabricating a double gate MOSFET device

A method of fabricating a double gate CMOS device, comprising:

• providing a silicon on insulator (SOI) substrate with a silicon layer overlying an insulating layer;
• forming a cap oxide layer on said silicon on insulator (SOI) substrate;
• providing a first photoresistor layer with a pattern defining source, drain and channel regions on said cap oxide layer;
• etching said cap oxide layer to form a hard mask;
• removing said first photoresistor layer;
• etching said silicon layer using the hard mask of said cap oxide layer as an etching mask to form the source, drain and channel regions extending from said insulating layer, said channel being a fin structure with a top surface and two opposing sidewalls, and form a recess in said insulating layer under each said opposing sidewall of said fin structure;
• forming a gate dielectric layer along each said opposing sidewall;
• forming a conductive gate layer straddling said fin structures;
• forming a second photoresistor layer with a pattern defining a first MOS device region on said conductive gate layer;
• performing a first titled ion implantation to implant dopants in said conductive gate layer of said first MOS device region, thereby said conductive gate layer having a first conductivity;
• removing said second photoresistor layer;
• forming a third photoresistor layer with a pattern defining a second MOS device region on said conductive gate layer;
• performing a second titled ion implantation to implant dopants in said conductive gate layer of said second MOS device region, thereby said conductive gate layer having a second conductivity;
• and
• removing said third photoresistor layer.