Synchronous and bi-directional variable frequency power conversion systems

A digital phase lock loop (DPLL) for variable frequency power conversion systems comprising:

• an input section that determines a reference phase angle error signal based on a reference phase angle of a variable frequency input and an estimated phase angle;
• a PI controller that determines a measured frequency of the variable frequency input based on the phase angle error signal;
• and
• a look-up table that, using the measured frequency, determines a phase angle step, a sampling frequency, and a phase angle delay, wherein the estimated phase angle is generated by a discrete integrator using the phase angle step and a prior value of the estimated phase angle, and a compensated phase angle is generated using the estimated phase angle and the phase angle delay.

A method for implementing a digital phase lock loop (DPLL) for variable frequency power conversion systems, the method comprising:

• determining a reference phase angle error signal based on a reference phase angle of a variable frequency input and an estimated phase angle;
• determining a measured frequency of the variable frequency input based on the phase angle error signal;
• and
• using the measured frequency as an input to a look-up table that generates a phase angle step, a sampling frequency, and a phase angle delay, wherein the estimated phase angle is generated by a discrete integrator using the phase angle step and a prior value of the estimated phase angle, and a compensated phase angle is generated using the estimated phase angle and the phase angle delay.