Interconnect module with reduced power distribution impedance

A method for forming an interconnect module, the method comprising:

• providing a laminated capacitor structure having a first conductive layer, a second conductive layer, and a dielectric layer formed between the first and second conductive layers and laminated into a unitary structure;
• forming a chip attach surface defining first contact pads for attachment of an integrated circuit chip to the interconnect module on a first side of the capacitor structure;
• forming a board attach surface defining second contact pads for attachment of the interconnect module to a printed wiring board on a second side of the capacitor structure;
• coupling the capacitor structure, the chip attach surface, and the board attach surface to form the interconnect module;
• and
• forming conductive paths that interconnect a plurality of the first contact pads to the first conductive layer,
• wherein the first contact pads, the conductive paths, and the capacitor structure produce a combined impedance of less than or equal to approximately 0.60 ohms at a frequency of greater than or equal to approximately 1.0 gigahertz.

An interconnect module comprising:

• a laminated capacitor structure;
• alternating conductive and dielectric layers laminated to opposite sides of the capacitor structure;
• and
• one or more blind vias extending through the conductive and dielectric layers, wherein the blind vias are plated and filled with a conductive material to define conductive paths between the laminated capacitor structure and outer conductive layers of the interconnect module, and
• wherein the contact pads, the conductive paths, and the capacitor structure produce a combined power distribution impedance of less than or equal to approximately 0.60 ohms at a frequency of greater than or equal to approximately 1.0 gigahertz.