Frequency sensing voltage regulator
AssigneeMicron Technology, Inc.
InventorsKent M. Kalpakjian, John D. Porter
Life of this patent
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Abstract
A frequency sensing voltage regulator is disclosed. A source follower transistor has a gate connected to a predetermined gate voltage, a drain coupled to an external supply voltage through a switching transistor, and a source connected to a load. The gate of the switching transistor is controlled by a delay circuit through which a pulse derived from the system clock is passed. Through the use of the delay circuit and the switching transistor, the amount of current produced by the source follower transistor is made a function of the cycle rate of the system clock and the current provided by the source follower transistor tracks the frequency-dependent current requirements of the load, resulting in a reduced variance of the supply voltage Vcc over a wide current range.
Claims14
A feedforward voltage controller comprising:
- a clock signal controller, said controller being adapted to receive a frequency signal at first input thereof and produce a control signal at a first output thereof;
- a controllable circuit, said controllable circuit being adapted to receive said control signal at a second input thereof, said controllable circuit being adapted to produce a voltage output at a second output thereof, a value of said voltage output being related to a value of said frequency signal;
- and
- an output node, said output node being coupled to said second output, said output node being adapted to be coupled to an electrical load, said electrical load being adapted to receive said frequency signal at a third input thereof.
A method of regulating an electrical current delivered to a clocked load device comprising:
- producing an electrical voltage related to a frequency of a clock signal received by said clocked load device at a clock input thereof;
- and
- receiving said electrical voltage at a voltage supply input of said clocked load device.
A voltage regulating system comprising:
- a first PMOS transistor having a first source, a first gate and a first drain, said first source being adapted to be coupled to a source of substantially constant electrical potential;
- a second NMOS transistor having a second source, second gate and a second drain, said first drain being electrically coupled to said second drain, said second source being adapted to be coupled to a supply input of a load device, said second gate being adapted to be coupled to a constant voltage source;
- and
- a voltage controller adapted to receive a clock signal and to produce a control signal at said first gate, said control signal having a value related to a frequency of said clock signal.
Dependencies are inferred from the claim text.