Motor control apparatus and motor control method
AssigneeSeiko Epson Corporation
InventorToshiki Takei
Life of this patent
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Abstract
Control data is efficiently serially transferred to a drive device for driving a motor without involving the CPU. Data buffers are allocated at specific memory addresses. An address decoder decodes a memory address output to the address bus and applies a write enable signal to the corresponding data buffer to write data to that data buffer by DMA transfer. When data is written to a data buffer, a sequencer circuit compiles control data, based on data in that data buffers, in a shift register, and serially transfers the control data one bit at a time on a serial transfer line synchronized to a clock.
Claims15
A motor control apparatus for serially transferring to a drive device adapted to drive one or more motors control data for controlling the one or more motors, the apparatus comprising:
- at least one data buffer configured to store data;
- a DMA configured to transfer data to the at least one data buffer by direct memory access;
- and
- a processing circuit configured to run a data compiling and transferring process that compiles control data from the data stored in the at least one data buffer and serially transfers the control data to the drive device based on the buffered data, wherein the processing circuit is configured to operate in a plurality of operating modes using different logic to compile the control data from the data stored in the at least one data buffer.
A motor control method for serially transferring to a drive device adapted to drive one or more motors control data for controlling the one or more motors, the method comprising the steps of:
- transferring data by direct memory access to at least one data buffer that stores data;
- and
- running a data compiling and transferring process that compiles control data from the data stored in the at least one data buffer and serially transfers the control data to the drive device based on the buffered data, wherein the data compiling and transferring process operates in a plurality of operating modes using different logic to compile the control data from the data stored in the at least one data buffer.
Dependencies are inferred from the claim text.