Class B driver
AssigneeMarvell International Ltd.
InventorsSehat Sutardja, Pierte Roo
Life of this patent
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Abstract
A communication circuit, Ethernet controller card, and method comprises K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding analog control signal, wherein K is at least two; K voltage-to-current converters each providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals; and wherein the corresponding bi-level transmit signal components of each of the K voltage-to-current converters are combined to produce a J-level transmit signal, wherein J=K+1.
Claims156
A communication circuit comprising:
- a digital-to-analog converter to receive a digital control signal, and to provide an analog control signal, the digital-to-analog converter comprising
- N current sources configured in a parallel arrangement,
- wherein N is at least two, and
- wherein each of the N current sources includes a respective control input,
- M delay elements, an mth one of the M delay elements including an input in communication with an m−1th one of the M delay elements,
- wherein M is equal to N−1,
- wherein an output of the mth one of the M delay elements controls the control input of an m+1th one of the N current sources,
- wherein an input of a first one of the M delay elements receives the digital control signal, and
- wherein the analog control signal comprises the sum of the outputs of the N current sources;
- and
- a voltage-to-current converter to provide a transmit signal based on the analog control signal.
A communication circuit, comprising:
- a digital-to-analog converter to receive a digital control signal, and to provide an analog control signal, the digital-to-analog converter comprising:
- N current sources configured in a parallel arrangement, wherein N is at least two, and wherein each of the N current sources includes a respective control input,
- M delay elements, an mth one of the M delay elements including an input in communication with an m−1th one of the M delay elements, wherein M is equal to N−1, wherein an output of the mth one of the M delay elements is arranged in communication with the control input of an m+1th one of the N current sources, wherein an input of a first one of the M delay elements receives the digital control signal, and
- wherein the analog control signal comprises the sum of the outputs of the N current sources;
- a voltage-to-current converter to provide a transmit signal based on the analog control signal,
- wherein the voltage-to-current-converter provides a replica of the transmit signal;
- a first sub-circuit having a composite input to receive a differential composite signal comprising the transmit signal, a replica input to receive a differential replica signal comprising the replica of the transmit signal, and a difference output to provide a differential difference signal representing a difference between the differential composite signal and the differential replica signal;
- a second sub-circuit which produces first and second single-ended replica signals which together substantially comprise the differential replica signal;
- and
- a third sub-circuit, which is coupled to the first and second sub-circuits, and which produces the differential replica signal from the first and second single-ended replica signals.
A communication circuit comprising:
- K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding analog control signal, wherein K is at least two;
- K voltage-to-current converters each providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals;
- and
- wherein the corresponding bi-level transmit signal component of each of the K voltage-to-current converters are combined to produce a J-level transmit signal, wherein J=K+1.
A communication circuit, comprising:
- K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding analog control signal, wherein K is at least two;
- K voltage-to-current converters each providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals;
- wherein the corresponding bi-level transmit signal component of each of the K voltage-to-current converters are combined to produce a J-level transmit signal, wherein J=K+1,
- wherein the K voltage-to-current converters provide a replica of the J-level transmit signal,
- wherein the replica of the transmit signal comprises first and second single-ended replica signals;
- a first sub-circuit which produces a differential replica signal from the first and second single-ended replica signals;
- and
- a second sub-circuit coupled to the first sub-circuit and the voltage-to current converters and having a composite input to receive a differential composite signal comprising the transmit signal, a replica input to receive the differential replica signal, and a difference output to provide a differential difference signal representing a difference between the differential composite signal and the differential replica signal.
A communication circuit comprising:
- K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding transmit signal component, wherein K is at least two, and wherein each of the K digital-to-analog converters comprises
- N current sources configured in a parallel arrangement, wherein N is at least two, and wherein each of the N current sources includes a respective control input,
- M delay elements, an mth one of the M delay elements including an input in communication with an m−1th one of the M delay elements, wherein M is equal to N−1, wherein an output of the mth one of the M delay elements controls the control input of an m+1th one of the N current sources, wherein an input of a first one of the M delay elements receives the corresponding digital control signal, and
- wherein the corresponding transmit signal component comprises the sum of the outputs of the N current sources;
- and
- wherein the corresponding transmit signal component of each of the K digital-to-analog converters are combined to produce a J-level transmit signal, wherein J=K +1.
A communication circuit, comprising:
- K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding transmit signal component, wherein K is at least two, and wherein each of the K digital-to-analog converters comprises:
- N current sources configured in a parallel arrangement, wherein N is at least two, and wherein each of the N current sources includes a respective control input,
- M delay elements, an mth one of the M delay elements including an input in communication with an m−1th one of the M delay elements, wherein M is equal to N−1, wherein an output of the mth one of the M delay elements is arranged in communication with the control input of an m+1th one of the N current sources, wherein an input of a first one of the M delay elements receives the corresponding digital control signal, and
- wherein the corresponding transmit signal component comprises the sum of the outputs of the N current sources;
- and
- wherein the corresponding transmit signal component of each of the K digital-to-analog converters are combined to produce a J-level transmit signal, wherein J=K+1;
- and
- L digital-to-analog converters each receiving the corresponding digital control signal and each providing a corresponding replica transmit signal component, wherein L=K;
- and
- wherein the corresponding replica transmit signal component of each of the L digital-to-analog converters are combined to produce a J-level replica transmit signal.
An Ethernet controller comprising:
- a digital-to-analog converter to receive a digital control signal, and to provide an analog control signal, the digital-to-analog converter comprising
- N current sources configured in a parallel arrangement,
- wherein N is at least two, and
- wherein each of the N current sources includes a respective control input,
- M delay elements, an mth one of the M delay elements including an input in communication with an m−1th one of the M delay elements,
- wherein M is equal to N−1,
- wherein an output of the mth one of the M delay elements controls the control input of an m+1th one of the N current sources,
- wherein an input of a first one of the M delay elements receives the digital control signal, and
- wherein the analog control signal comprises the sum of the outputs of the N current sources;
- and
- a voltage-to-current converter to provide a transmit signal based on the analog control signal.
An Ethernet controller, comprising:
- a digital-to-analog converter to receive a digital control signal, and to provide an analog control signal, the digital-to-analog converter comprising:
- N current sources configured in a parallel arrangement, wherein N is at least two, and wherein each of the N current sources includes a respective control input,
- M delay elements, an mth one of the M delay elements including an input in communication with an m−1th one of the M delay elements, wherein M is equal to N−1, wherein an output of the mth one of the M delay elements is arranged in communication with the control input of an m+1th one of the N current sources, wherein an input of a first one of the M delay elements receives the digital control signal, and
- wherein the analog control signal comprises the sum of the outputs of the N current sources;
- a voltage-to-current converter to provide a transmit signal based on the analog control signal,
- wherein the voltage-to-current converter provides a replica of the transmit signal;
- a first sub-circuit having a composite input to receive a differential composite signal comprising the transmit signal, a replica input to receive a differential replica signal comprising the replica of the transmit signal, and a difference output to provide a differential difference signal representing a difference between the differential composite signal and the differential replica signal;
- a second sub-circuit which produces first and second single-ended replica signals which together substantially comprise the differential replica signal;
- and
- a third sub-circuit, which is coupled to the first and second sub-circuits, and which produces the differential replica signal from the first and second single-ended replica signals.
An Ethernet controller comprising:
- K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding analog control signal, wherein K is at least two;
- K voltage-to-current converters each providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals;
- and
- wherein the corresponding bi-level transmit signal component of each of the K voltage-to-current converters are combined to produce a J-level transmit signal, wherein J=K+1.
An Ethernet controller, comprising:
- K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding analog control signal, wherein K is at least two;
- K voltage-to-current converters each providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals;
- and
- wherein the corresponding bi-level transmit signal component of each of the K voltage-to-current converters are combined to produce a J-level transmit signal, wherein J=K+1,
- wherein the K voltage-to-current converters provide a replica of the J-level transmit signal,
- wherein the replica of the transmit signal comprises first and second single-ended replica signals;
- a first sub-circuit which produces a differential replica signal from the first and second single-ended replica signals;
- and
- a second sub-circuit coupled to the first sub-circuit and the voltage-to current converters and having a composite input to receive a differential composite signal comprising the transmit signal, a replica input to receive the differential replica signal, and a difference output to provide a differential difference signal representing a difference between the differential composite signal and the differential replica signal.
An Ethernet controller comprising:
- K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding transmit signal component, wherein K is at least two, and wherein each of the K digital-to-analog converters comprises
- N current sources configured in a parallel arrangement, wherein N is at least two, and wherein each of the N current sources includes a respective control input,
- M delay elements, an mth one of the M delay elements including an input in communication with an m−1th one of the M delay elements, wherein M is equal to N−1, wherein an output of the mth one of the M delay elements controls the control input of an m+I th one of the N current sources, wherein an input of a first one of the M delay elements receives the corresponding digital control signal, and
- wherein the corresponding transmit signal component comprises the sum of the outputs of the N current sources;
- and
- wherein the corresponding transmit signal component of each of the K digital-to-analog converters are combined to produce a J-level transmit signal, wherein J=K+1.
An Ethernet controller, comprising:
- K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding transmit signal component, wherein K is at least two, and wherein each of the K digital-to-analog converters comprises:
- N current sources configured in a parallel arrangement, wherein N is at least two, and wherein each of the N current sources includes a respective control input,
- M delay elements, an mth one of the M delay elements including an input in communication with an m−1th one of the M delay elements, wherein M is equal to N−1, wherein an output of the mth one of the M delay elements is arranged in communication with the control input of an m+1th one of the N current sources, wherein an input of a first one of the M delay elements receives the corresponding digital control signal, and
- wherein the corresponding transmit signal component comprises the sum of the outputs of the N current sources;
- and
- wherein the corresponding transmit signal component of each of the K digital-to-analog converters are combined to produce a J-level transmit signal, wherein J=K+1;
- and
- L digital-to-analog converters each receiving the corresponding digital control signal and each providing a corresponding replica transmit signal component, wherein L=K;
- and
- wherein the corresponding replica signal component of each of the L digital-to-analog converters are combined to produce a J-level replica transmit signal.
A communication circuit comprising:
- digital-to-analog converter means for receiving a digital control signal, and for providing an analog control signal, the digital-to-analog converter means comprising
- N current source means for providing current configured in a parallel arrangement,
- wherein N is at least two, and
- wherein each of the N current source means includes a respective means for inputting;
- and
- M delay means for delaying, an mth one of the M delaying means including means for inputting in communication with an m−1th one of the M delay means,
- wherein M is equal to N−1, and
- wherein means for outputting of the mth one of the M delay means controls the inputting means of an m+1th one of the N current source means, and
- wherein the analog control signal comprises the sum of the outputs of the N current source means;
- and
- voltage-to-current converter means for providing a transmit signal based on the analog control signal.
A communication circuit, comprising:
- digital-to-analog converter means for receiving a digital control signal, and for providing an analog control signal, the digital-to-analog converter means comprising:
- N current source means for providing current configured in a parallel arrangement, wherein N is at least two, and wherein each of the N current source means includes a respective means for inputting;
- and
- M delay means for delaying, an mth one of the M delaying means including means for inputting in communication with an m−1th one of the M delay means, wherein M is equal to N−1, and wherein means for outputting of the mth one of the M delay means is arranged in communication with the inputting means of an m+1th one of the N current source means, and
- wherein the analog control signal comprises the sum of the outputs of the N current source means;
- voltage-to-current converter means for providing a transmit signal based on the analog control signal,
- wherein the voltage-to-current converter means provides a replica of the transmit signal;
- summing means for receiving a differential composite signal comprising the transmit signal, receiving a differential replica signal comprising the replica of the transmit signal, and providing a differential difference signal representing a difference between the differential composite signal and the differential replica signal;
- replicating means for producing first and second single-ended replica signals which together substantially comprise the differential replica signal;
- and
- converting means, which is coupled to the summing means and replicating means, for producing the differential replica signal from the first and second single-ended replica signals.
A communication circuit comprising:
- K digital-to-analog converter means each for receiving a corresponding digital control signal and each for providing a corresponding analog control signal, wherein K is at least two;
- K voltage-to-current converter means each for providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals;
- and
- wherein the corresponding bi-level transmit signal components of each of the K voltage-to-current converter means are combined to produce a J-level transmit signal, wherein J=K+1.
A communication circuit, comprising:
- K digital-to-analog converter means each for receiving a corresponding digital control signal and each for providing a corresponding analog control signal, wherein K is at least two;
- K voltage-to-current converter means each for providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals,
- wherein the corresponding bi-level transmit signal components of each of the K voltage-to-current converter means are combined to produce a J-level transmit signal, wherein J=K+1,
- wherein the K voltage-to-current converter means provide a replica of the J-level transmit signal,
- wherein the replica of the transmit signal comprises first and second single-ended replica signals;
- converter means for producing a differential replica signal from the first and second single-ended replica signals;
- and
- summing means, coupled to the converter means and the voltage-to current converter means, for receiving a differential composite signal comprising the transmit signal, receiving the differential replica signal, and providing a differential difference signal representing a difference between the differential composite signal and the differential replica signal.
A communication circuit comprising:
- K digital-to-analog converter means each for receiving a corresponding digital control signal and each for providing a corresponding transmit signal component, wherein K is at least two, and wherein at least one each of the K digital-to-analog converter means comprises
- N current source means for providing current configured in a parallel arrangement, wherein N is at least two, and wherein each of the N current source means includes a respective means for inputting;
- and
- M delay means for delaying, an mth one of the M delaying means including means for inputting in communication with an m−1th one of the M delay means, wherein M is equal to N−1, and wherein means for outputting of the mth one of the M delay means controls the inputting means of an m+1th one of the N current source means, and
- wherein the corresponding transmit signal component comprises the sum of the outputs of the N current sources;
- and
- wherein the corresponding transmit signal components of each of the K digital-to-analog converter means are combined to produce a J-level transmit signal, wherein J=K+1.
A communication circuit, comprising:
- K digital-to-analog converter means each for receiving a corresponding digital control signal and each for providing a corresponding transmit signal component,
- wherein K is at least two, and
- wherein at least one each of the K digital-to-analog converter means comprises:
- N current source means for providing current configured in a parallel arrangement,
- wherein N is at least two, and
- wherein each of the N current source means includes a respective means for inputting, and
- M delay means for delaying, an mth one of the M delaying means including means for inputting in communication with an m−1th one of the M delay means,
- wherein M is equal to N−1, and
- wherein means for outputting of the mth one of the M delay means is arranged in communication with the inputting means of an m+1th one of the N current source means,
- wherein the corresponding transmit signal component comprises the sum of the outputs of the N current sources, and
- wherein the corresponding transmit signal components of each of the K digital-to-analog converter means are combined to produce a J-level transmit signal wherein J=K+1;
- and
- L digital-to-analog converter means each for receiving the corresponding digital control signal and each for providing a corresponding replica transmit signal component,
- wherein L=K, and
- wherein the corresponding replica transmit signal components of each of the L digital-to-analog converters are combined to produce a J-level replica transmit signal.
An Ethernet controller comprising:
- digital-to-analog converter means for receiving a digital control signal, and for providing an analog control signal, the digital-to-analog converter means comprising
- N current source means for providing current configured in a parallel arrangement,
- wherein N is at least two, and
- wherein each of the N current source means includes a respective means for inputting;
- and
- M delay means for delaying, an mth one of the M delaying means including means for inputting in communication with an m−1th one of the M delay means,
- wherein M is equal to N−1, and
- wherein means for outputting of the mth one of the M delay means controls the inputting means of an m+1th one of the N current source means, and
- wherein the analog control signal comprises the sum of the outputs of the N current source means;
- and
- voltage-to-current converter means for providing a transmit signal based on the analog control signal.
An Ethernet controller, comprising:
- digital-to-analog converter means for receiving a digital control signal, and for providing an analog control signal, the digital-to-analog converter means comprising:
- N current source means for providing current configured in a parallel arrangement, wherein N is at least two, and wherein each of the N current source means includes a respective means for inputting;
- and
- M delay means for delaying, an mth one of the M delaying means including means for inputting in communication with an m−1th one of the M delay means, wherein M is equal to N−1, and wherein means for outputting of the mth one of the M delay means is arranged in communication with the inputting means of an m+1th one of the N current source means, and
- wherein the analog control signal comprises the sum of the outputs of the N current source means;
- voltage-to-current converter means for providing a transmit signal based on the analog control signal,
- wherein the voltage-to-current converter means provides a replica of the transmit signal;
- summing means for receiving a differential composite signal comprising the transmit signal, receiving a differential replica signal comprising the replica of the transmit signal, and providing a differential difference signal representing a difference between the differential composite signal and the differential replica signal;
- replicating means for producing first and second single-ended replica signals which together substantially comprise the differential replica signal;
- and
- converting means, which is coupled to the summing means and replicating means, for producing the differential replica signal from the first and second single-ended replica signals.
An Ethernet controller comprising:
- K digital-to-analog converter means each for receiving a corresponding digital control signal and each for providing a corresponding analog control signal, wherein K is at least two;
- K voltage-to-current converter means each for providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals;
- and
- wherein the corresponding bi-level transmit signal components of each of the K voltage-to-current converter means are combined to produce a J-level transmit signal, wherein J=K+1.
An Ethernet controller, comprising:
- K digital-to-analog converter means each for receiving a corresponding digital control signal and each for providing a corresponding analog control signal, wherein K is at least two;
- K voltage-to-current converter means each for providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals,
- wherein the corresponding bi-level transmit signal components of each of the K voltage-to-current converter means are combined to produce a J-level transmit signal, wherein J=K+1,
- wherein the K voltage-to-current converter means provide a replica of the J-level transmit signal,
- wherein the replica of the transmit signal comprises first and second single-ended replica signals;
- converter means for producing a differential replica signal from the first and second single-ended replica signals;
- and
- summing means, coupled to the converter means and the voltage-to current converter means, for receiving a differential composite signal comprising the transmit signal, receiving the differential replica signal, and providing a differential difference signal representing a difference between the differential composite signal and the differential replica signal.
An Ethernet controller comprising:
- K digital-to-analog converter means each for receiving a corresponding digital control signal and each for providing a corresponding transmit signal component, wherein K is at least two, and wherein at least one each of the K digital-to-analog converter means comprises
- N current source means for providing current configured in a parallel arrangement, wherein N is at least two, and wherein each of the N current source means includes a respective means for inputting, and
- M delay means for delaying, an mth one of the M delaying means including means for inputting in communication with an m−1th one of the M delay means, wherein M is equal to N−1, and wherein means for outputting of the mth one of the M delay means controls the inputting means of an m+1th one of the N current source means,
- wherein the corresponding transmit signal component comprises the sum of the outputs of the N current sources;
- and
- wherein the corresponding transmit signal components of each of the K digital-to-analog converter means are combined to produce a J-level transmit signal, wherein J=K+1.
An Ethernet controller, comprising:
- K digital-to-analog converter means each for receiving a corresponding digital control signal and each for providing a corresponding transmit signal component,
- wherein K is at least two, and
- wherein at least one each of the K digital-to-analog converter means comprises:
- N current source means for providing current configured in a parallel arrangement,
- wherein N is at least two, and
- wherein each of the N current source means includes a respective means for inputting, and
- M delay means for delaying, an mth one of the M delaying means including means for inputting in communication with an m−1th one of the M delay means,
- wherein M is equal to N−1, and
- wherein means for outputting of the mth one of the M delay means is arranged in communication with the inputting means of an m+1th one of the N current source means,
- wherein the corresponding transmit signal component comprises the sum of the outputs of the N current sources, and
- wherein the corresponding transmit signal components of each of the K digital-to-analog converter means are combined to produce a J-level transmit signal, wherein J=K+1;
- and
- L digital-to-analog converter means each for receiving the corresponding digital control signal and each for providing a corresponding replica transmit signal component, wherein L=K, and
- wherein the corresponding replica transmit signal components of each of the L digital-to-analog converters are combined to produce a J-level replica transmit signal.
A communication method comprising:
- receiving a digital control signal;
- providing an analog control signal in accordance with the digital control signal, comprising
- supplying N sources of current, wherein N is at least two;
- controlling the supply of current from each of the N sources of current;
- delaying current from M of the N sources of current,
- where M is equal to N−1, and
- wherein an output of an mth one of M delaying steps controls an m+1th one of the N sources of current;
- and
- summing the delayed currents,
- wherein the analog control signal comprises the sum of the delayed currents;
- and
- providing a transmit signal based on the analog control signal.
A communication method, comprising the steps of:
- receiving a digital control signal;
- providing an analog control signal in accordance with the digital control signal, comprising the steps of:
- supplying N sources of current, wherein N is at least two;
- controlling the supply of current from each of the N sources of current;
- delaying current from M of the N sources of current, where M is equal to N−1;
- and
- summing the delayed currents,
- wherein the analog control signal comprises the sum of the delayed currents;
- providing a transmit signal based on the analog control signal;
- providing a replica of the transmit signal;
- receiving a differential composite signal comprising the transmit signal;
- receiving a differential replica signal comprising the replica of the transmit signal;
- providing a differential difference signal representing a difference between the differential composite signal and the differential replica signal;
- producing first and second single-ended replica signals which together substantially comprise the differential replica signal;
- and
- producing the differential replica signal from the first and second single-ended replica signals.
A communication method comprising:
- receiving K digital control signals, wherein K is at least two;
- providing a corresponding analog control signal for each of the K digital control signals;
- providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals;
- and
- combining the corresponding bi-level transmit signal components to produce a J-level transmit signal, wherein J=K+1.
A communication method, comprising the steps of:
- receiving K digital control signals, wherein K is at least two;
- providing a corresponding analog control signal for each of the K digital control signals;
- providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals;
- combining the corresponding bi-level transmit signal components to produce a i-level transmit signal, wherein J=K+1;
- providing a replica of the J-level transmit signal,
- wherein the replica of the transmit signal comprises first and second single-ended replica signals;
- producing a differential replica signal from the first and second single-ended replica signals;
- and
- providing a differential difference signal representing a difference between the differential replica signal and a differential composite signal comprising the transmit signal.
A communication method comprising:
- receiving K digital control signals, wherein K is at least two;
- providing a corresponding transmit signal component for each of the K digital control signals, comprising
- supplying N sources of current, wherein N is at least two,
- controlling the supply of current from each of the N sources of current,
- delaying current from M of the N sources of current,
- where M is equal to N−1, and
- wherein an output of an mth one of M delaying steps controls an m+1th one of the N sources of current, and
- summing the delayed currents,
- wherein the corresponding transmit signal component comprises the sum of the delayed currents;
- and
- combining the corresponding transmit signal components to produce a J-level transmit signal, wherein J=K+1.
A communication method, comprising the steps of:
- receiving K digital control signals, wherein K is at least two;
- providing a corresponding transmit signal component for each of the K digital control signals, comprising the steps of:
- supplying N sources of current, wherein N is at least two;
- controlling the supply of current from each of the N sources of current;
- delaying current from M of the N sources of current, where M is equal to N−1;
- and
- summing the delayed currents,
- wherein the corresponding transmit signal component comprises the
- sum of the delayed currents;
- combining the corresponding transmit signal components to produce a J-level transmit signal, wherein J=K+1;
- receiving the corresponding digital control signals;
- providing a corresponding replica transmit signal component for each of the corresponding digital control signals;
- and
- combining the corresponding replica transmit signal components to produce a J-level replica transmit signal.
A communication circuit, comprising:
- a plurality of sets of digital-to-analog converters (DACs),
- wherein the plurality of sets of DACs are arranged in parallel,
- wherein each DAC within a set of DACs is configured to receive a digital signal and to provide an output signal, and
- wherein each DAC comprises:
- N current sources arranged in parallel,
- wherein N is at least two,
- wherein each of the N current sources includes a respective control input, and
- wherein the output signal provided by each DAC comprises a sum of outputs of the N current sources;
- and
- M delay elements,
- wherein an mth one of the M delay elements includes an input in communication with an m−1th one of the M delay elements,
- wherein M is equal to N−1,
- wherein an output of the mth one of the M delay elements controls the control input of an m+1th one of the N current sources,
- wherein an input of a first one of the M delay elements receives the digital signal, and
- wherein a sum of each output signal from a respective one of the plurality of sets of DACs forms a transmit signal.
A communication circuit, comprising:
- a plurality of sets of digital-to-analog converter (DAC) means,
- wherein the plurality of sets of DAC means are arranged in parallel,
- wherein each DAC means within a set of DAC means is configured to receive a digital signal and to provide an output signal, and
- wherein each DAC means comprises:
- N current source means arranged in parallel,
- wherein N is at least two,
- wherein each of the N current source means includes a respective means for inputting, and
- wherein the output signal provided by each DAC means comprises a sum of outputs of the N current source means;
- and
- M delay means,
- wherein an mth one of the M delay means includes a means for inputting in communication with an m−1th one of the M delay means,
- wherein M is equal to N−1,
- wherein means for outputting of the mth one of the M delay means controls the inputting means of an m+1th one of the N current source means,
- wherein the inputting means of a first one of the M delay elements receives the digital signal, and
- wherein a sum of each output signal from a respective one of the plurality of sets of DAC means forms a transmit signal.
An Ethernet controller, comprising:
- a plurality of sets of transceivers,
- wherein the plurality of sets of transceivers are arranged in parallel,
- wherein each transceiver within a set of transceivers is configured to receive a digital signal and to provide an output signal, and
- wherein each transceiver comprises:
- N current sources arranged in parallel,
- wherein N is at least two,
- wherein each of the N current sources includes a respective control input, and
- wherein the output signal provided by each transceiver comprises a sum of outputs of the N current sources;
- and
- M delay elements,
- wherein an mth one of the M delay elements includes an input in communication with an m−1th one of the M delay elements,
- wherein M is equal to N−1,
- wherein an output of the mth one of the M delay elements controls the control input of an m+1th one of the N current sources,
- wherein an input of a first one of the M delay elements receives the digital signal, and
- wherein a sum of each output signal from a respective one of the plurality of sets of transceivers forms a transmit signal.
An Ethernet controller, comprising:
- a plurality of sets of transceiver means,
- wherein the plurality of sets of transceiver means are arranged in parallel,
- wherein each transceiver means within a set of transceiver means is configured to receive a digital signal and to provide an output signal, and
- wherein each transceiver means comprises:
- N current source means arranged in parallel,
- wherein N is at least two,
- wherein each of the N current source means includes a respective means for inputting, and
- wherein the output signal provided by each transceiver means comprises a sum of outputs of the N current source means;
- and
- M delay means,
- wherein an mth one of the M delay means includes a means for inputting in communication with an m−1th one of the M delay means,
- wherein M is equal to N−1,
- wherein means for outputting of the mth one of the M delay means controls the inputting means of an m+1th one of the N current source means,
- wherein the inputting means of a first one of the M delay elements receives the digital signal, and
- wherein a sum of each output signal from a respective one of the plurality of sets of transceiver means forms a transmit signal.
A communication method, comprising the steps of:
- a.) receiving K digital signals, wherein K is at least two;
- b.) providing K corresponding transmit signal components in accordance with each of the K digital signals,
- wherein for each transmit signal component, step (b) comprises the steps of:
- b1.) supplying N sources of current,
- wherein N is at least two;
- b2.) controlling the supply of current from each of the N sources of current;
- b3.) delaying current from M of the N sources of current,
- wherein M is equal to N−1, and
- wherein an output of an mth one of M delaying steps controls an m+1th one of the N sources of current;
- and
- b4.) summing the delayed currents;
- and
- c.) combining the K corresponding transmit signal components to produce a J-level transmit signal.
Dependencies are inferred from the claim text.