Partially de-coupled core and periphery gate module process
AssigneeAdvanced Micro Devices, Inc.
InventorsJeff P. Erhardt, Hiroyuki Kinoshita, Cyrus Tabery
Life of this patent
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Abstract
The invention is an apparatus and a method of manufacturing a structure. The method includes the step of patterning a layer to include a line and space pattern. A space of the line and space pattern in a first region includes a first critical dimension less than achievable at a resolution limit of lithography. A line of the line and space pattern in a second region includes a second critical dimension achievable at a resolution limit of lithography. A sidewall spacer is formed on a line from a masking layer used in the formation of the structure. The method uses one critical masking step and two non-critical masking steps.
Claims13
A method of forming a layer comprising a line and space pattern over a substrate including a first region and a second region, the method comprising the steps of:
- depositing and patterning a first hard mask layer over the layer to form a master line and space pattern therein,
- wherein a first master line and space pattern in the first hard mask layer includes at least one line and at least one space of a minimum dimension dictated by a resolution limit of lithography;
- etching the layer to form the line and space pattern in the second region corresponding to the first master line and space pattern in the first hard mask layer in the second region,
- wherein a line in the second region includes a first critical dimension (B) achievable at the resolution limit of lithography;
- depositing a second hard mask layer over the patterned first hard mask layer,
- etching the second hard, mask layer to form sidewall spacers on sidewalls of at the least one line in the first hard mask layer in the first region,
- wherein the minimum dimension of the at least one space in the first hard mask layer in the first region is reduced to a second critical dimension (A) less than achievable at the resolution limit of lithography;
- to form sidewall spacers on sidewalls of the at least one line in the second region;
- and
- etching the layer to form the line and space pattern in the first region corresponding to the first master line and space pattern in the first hard mask layer in the first region,
- wherein a space in the first region includes the second critical dimension (A) less than achievable by the resolution limit of lithography.
A method of patterning a layer on a substrate including a first region and a second region, the method comprising the steps of:
- providing a substrate including the layer to be patterned interposed between the substrate and a first hard mask layer to be patterned;
- coating the first hard mask layer to be patterned with a first photosensitive layer;
- patterning and etching the first photosensitive layer to form a first patterned image including lines and at least one space, the lines in the first photosensitive layer and the at least one space include substantially vertical walls and include a minimum dimension (B) achievable at a resolution limit of lithography;
- transferring to the first hard mask layer the first patterned image by anisotropically etching the first hard mask layer to form lines and at least one space, the lines and the at least one space in the first hard mask layer include substantially vertical walls and the minimum dimension (B) achievable at the resolution limit of lithography;
- coating the first hard mask layer with a second photosensitive layer;
- patterning and etching the second photosensitive layer to form a second patterned image including a mask over the first region and exposing the second region;
- etching the layer in the second region to form a line and space pattern therein including at least one line in the second region including the critical dimension (B) achievable at the resolution limit of lithography;
- depositing a conformal hard mask layer over the hard mask layer, exposed surfaces of the layer and exposed surfaces of the substrate;
- forming sidewall spacers on the vertical walls of the lines of the first hard mask in the first region whereby the minimum dimension (B) of the at least one space in the first region is reduced;
- forming sidewall spacers on the vertical walls of the at least one line in the second region;
- coating the substrate with a third photosensitive layer;
- patterning and etching the third photosensitive layer to form a third patterned image,
- wherein the first region is exposed and a remaining portion of the third photosensitive layer acts as a mask in the second region;
- etching the layer in the first region to form a line and space pattern,
- wherein the at least one space in the layer in the first region includes a second critical dimension (A) less than achievable by the resolution limit of lithography.
Dependencies are inferred from the claim text.