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US 6,825,506 B2Granted
Field effect transistor and method of fabrication
AssigneeIntel Corporation
InventorsRobert S. Chau, Doulgas Barlage, Been-Yih Jin
Life of this patent
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Abstract
The present invention is a novel field effect transistor having a channel region formed from a narrow bandgap semiconductor film formed on an insulating substrate. A gate dielectric layer is formed on the narrow bandgap semiconductor film. A gate electrode is then formed on the gate dielectric. A pair of source/drain regions formed from a wide bandgap semiconductor film or a metal is formed on opposite sides of the gate electrode and adjacent to the low bandgap semiconductor film.
Claims27
A transistor comprising:
- a channel region formed from a narrow bandgap semiconductor film formed on insulating substrate;
- a gate dielectric formed on said narrow bandgap semiconductor film;
- a gate electrode formed on said gate dielectric;
- and
- a pair of source/drain regions formed from a semiconductor film having a wider bandgap than said narrow bandgap semiconductor film formed on opposite sides of said gate electrode and adjacent to said low bandgap semiconductor film and wherein said gate electrode overlaps a portion of said source/drain.
2 more elements
A transistor comprising:
- a channel region formed from narrow bandgap semiconductor film formed on an insulating substrate;
- a gate dielectric formed on said narrow bandgap semiconductor film;
- a gate electrode formed on said gate dielectric;
- and
- a pair of metal source/drain regions formed along opposite sides of said gate electrode and adjacent to said narrow bandgap semiconductor film and wherein said gate electrode overlaps a portion of said source/drain.
2 more elements
A transistor comprising:
- a channel region formed from a narrow bandgap semiconductor film formed on insulating substrate;
- a gate dielectric having a dielectric constant greater than 9.0 formed on said narrow bandgap semiconductor film;
- a gate electrode formed on said gate dielectric;
- and
- a pair of source/drain regions formed on said insulating substrate and adjacent to opposite sides of said narrow bandgap semiconductor film wherein said gate dielectric overlaps a portion of said source/drain regions.
2 more elements
Dependencies are inferred from the claim text.