Preamplifier circuit suitable for use in magnetic storage devices

A magnetic storage device, comprising:

• at least one magnetic disk;
• a magnetic head which includes a read sensor;
• a suspension which supports the magnetic head;
• read circuitry which receives signals from the read sensor;
• an electrical connection which couples the read sensor to the read circuitry;
• the read circuitry including:
• a differential input which includes a first input node and a second input node coupled to the electrical connection;
• first, second, third, and fourth transistors;
• first and second capacitive elements;
• first and second fixed current sources;
• the first transistor having a base coupled to the first input node of the differential input;
• a collector for coupling to a voltage source;
• and an emitter coupled to the first current source;
• the second transistor having an emitter coupled to the first current source and to a first end of the first capacitive element;
• a base coupled to a biasing voltage and to a first end of the second capacitive element;
• and a collector for coupling to the voltage source;
• the third transistor having a base coupled to the second input node of the differential input;
• a collector for coupling to the voltage source;
• and an emitter coupled to the second current source;
• the fourth transistor having the emitter coupled to the second current source and to a second end of the second capacitive element;
• a base coupled to the biasing voltage and to a second end of the first capacitive element;
• and a collector for coupling to the voltage source;
• and
• a differential output which includes a first output node coupled to the collector of the first transistor and a second output node coupled to the collector of the third transistor.

An integrated circuit (IC), comprising:

• a differential input including a first input node and a second input node;
• first, second, third, and fourth transistors;
• first and second current sources;
• first and second capacitive elements;
• first, second, third, and fourth resistive elements;
• the first transistor having a base coupled to the first input node of the differential input;
• a collector for coupling to a voltage source through the first resistive element;
• and an emitter coupled to an emitter of the second transistor;
• the second transistor having an emitter coupled to the first current source and to a first end of the first capacitive element;
• a base coupled to a biasing voltage through the second resistive element and to a first end of the second capacitive element;
• and a collector for coupling to the voltage source;
• the third transistor having a base coupled to the second input node of the differential input;
• a collector for coupling to the voltage source through the third resistive element;
• and an emitter coupled to an emitter of the fourth transistor;
• the fourth transistor having the emitter coupled to the second current source and to a second end of the second capacitive element;
• a base coupled to the biasing voltage through the fourth resistive element and to a second end of the first capacitive element;
• and a collector for coupling to the voltage source;
• a differential output which includes a first output node coupled to the collector of the first transistor and a second output node coupled to the collector of the third transistor;
• and
• an operational transconductance amplifier having first and second inputs coupled to the first and the second output nodes, and first and second outputs coupled to the first and the second input nodes.

An electronic device, comprising:

• a signal receiving device;
• an integrated circuit (IC);
• an electrical connection for coupling the signal receiving device to the IC;
• an electronic circuit in the IC including:
• a differential input including a first input node and a second input node for coupling to the electrical connection;
• first, second, third, and fourth transistors;
• first and second fixed current sources;
• first and second capacitive elements;
• first, second, third, and fourth resistive elements;
• the first transistor having a base coupled to the first input node of the differential input;
• a collector for coupling to a voltage source through the first resistive element;
• and an emitter coupled to the first current source;
• the second transistor having an emitter coupled to the first current source and to a first end of the first capacitive element;
• a base coupled to a biasing voltage through the third resistive element and to a first end of the second capacitive element;
• and a collector for coupling to the voltage source;
• the third transistor having a base coupled to the second input node of the differential input;
• a collector for coupling to the voltage source through the second resistive element;
• and an emitter coupled to the second current source;
• the fourth transistor having the emitter coupled to the second current source and to a second end of the second capacitive element;
• a base coupled to the biasing voltage through the fourth resistive element and to a second end of the first capacitive element;
• and a collector for coupling to the voltage source;
• a differential output which includes a first output node coupled to the collector of the first transistor and a second output node coupled to the collector of the third transistor;
• an operational transconductance amplifier which has:
• first and second inputs coupled to the first and the second output nodes of the differential output;
• first and second outputs coupled to the first and the second input nodes of the differential input;
• a first buffer circuit having an input coupled to the collector of the second transistor and an output coupled to one of the first and the second input nodes through a first feedback resistor;
• and
• a second buffer circuit having an input coupled to the collector of the fourth transistor and an output coupled to the other one of the first and the second input nodes through a second feedback resistor.