Double-sided etching technique for providing a semiconductor structure with through-holes, and a feed-through metalization process for sealing the through-holes
AssigneeHymite A/S
InventorMatthias Heschel
Life of this patent
Estimating the term…
Abstract
Double-sided etching techniques are disclosed for providing a semiconductor structure with one or more through-holes. The through-holes may be sealed hermetically such as by a feed-through metallization process. The feed-through metallization process may include using an electroplating technique and may provide electrical contact to an opto-electronic or integrated circuit encapsulated in a package with the semiconductor structure used as a lid.
Claims14
A method of providing a semiconductor structure with one or more through-holes, the semiconductor structure comprising a front surface and a back surface substantially opposite, a front semiconductor layer facing the back surface a second semiconductor layer facing the front surface, and a substantially etch-resistant layer arranged between the first and second semiconductor layer, the method comprising:
- etching from the back surface through the first back semiconductor layer;
- stopping the etching from the back surface when a back position of the etch-resistant layer is exposed, the exposed back portion of the etch-resistant layer corresponding to positions of the one or more through-holes;
- etching from the front surface through the second semiconductor layer;
- stopping the etching from the front surface when a front portion of the of the etch-resistant layer is exposed, the exposed front portion of the etch-resistant layer corresponding to positions of the one or more through-holes;
- removing at least the part of the etch-resistant layer corresponding to positions of the one or more through-holes to form the one or more through-holes after the etching;
- and
- hermetically sealing the one or more through-holes.
A method of providing a semiconductor structure with one or more through-holes, the semiconductor structure comprising a front surface and a back surface substantially opposite a first semiconductor layer facing the back surface, a second semiconductor layer facing the front surface and a substantially etch-resistant layer arranged between the first and second semiconductor layer, the method comprising;
- etching from the back surface through the first semiconductor layer;
- stopping the etching from the back surface when a back portion of the of the etch-resistant layer is exposed, the exposed back portion of the etch-resistant layer corresponding to positions of the one or more through-holes;
- etching from the front surface through the second semiconductor layer;
- stopping the etching from the front surface when a front portion of the of the etch-resistant layer is exposed, the exposed front portion of the etch-resistant layer corresponding to positions of the one or more through-holes;
- removing at least the part of the etch-resistant layer corresponding to positions of the one or more through-holes to form the one or more through-holes after the etching;
- and
- using a feed-through metallization process to seal at least one of the through-holes, wherein sealing at least one of the through-holes includes:
- providing an adhesion layer;
- providing a plating base;
- providing a feed-through metallization;
- providing a diffusion burner;
- providing a wetting layer;
- and
- providing an antioxidation barrier.
Dependencies are inferred from the claim text.