High-speed analog-to-digital converter using a unique gray code

An analog to digital converter comprising:

• a plurality of comparators with adjustable thresholds for receiving a multilevel signal;
• a plurality of decoder blocks coupled to the comparators for decoding the multilevel signal, wherein each decoder block comprises a plurality of identical parity detectors relative to another decoder block, whereby the analog to digital converter has a design that reduces dissipated power and increases communication speed.

An analog to digital converter comprising:

• a plurality of comparators for receiving a multilevel signal generated by a code for which the bit error rate is substantially evenly distributed across each bit channel when decoded;
• a plurality of decoder blocks coupled to the comparators for decoding the multilevel signal, wherein each decoder block comprises an equal number of parity detectors, whereby the analog to digital converter reduces power consumption.

An analog to digital converter comprising:

• a plurality of comparators for receiving a multilevel signal, each comparator having an individually adjustable threshold level;
• a plurality of decoder blocks coupled to the comparators for decoding the multilevel signal, wherein each decoder block comprises identical hardware relative to another decoder block, whereby the analog to digital converter has a design that increases communication speeds.

An analog to digital converter comprising:

• a plurality of comparators for receiving a multilevel signal generated according to a three bit Gray code derived from a bit translation operating list comprising ABCBABC with an operator comprising B and the operator returning an original seed from a last word in the three bit Gray code;
• a plurality of decoder blocks coupled to comparators for decoding the multilevel signal, wherein each decoder block comprises an equal number of inputs.

An analog to digital converter comprising:

• a plurality of comparators for receiving a multilevel signal generated according to a four bit Gray code derived from a bit translation operating list comprising CBCADABCBADBDCD with an operator comprising A and the operator returning an original seed from a last word in the four bit Gray code;
• a plurality of decoder blocks coupled to comparators for decoding the multilevel signal, wherein each decoder block comprises an equal number of inputs.

An analog to digital converter comprising:

• a plurality of comparators for receiving a multilevel signal generated according to a five bit Gray code derived from a bit translation operating list comprising ABACABADABEBDCDEBEDCACDECEBDCDE, with an operator comprising D and the operator returning an original seed from a last word in the five bit Gray code;
• a plurality of decoder blocks coupled to comparators for decoding the multilevel signal, wherein each decoder block comprises an equal number of inputs.