Output circuit device for clock signal distribution in high-speed signal transmission

An output circuit system having a plurality of output circuit devices, multi phase clocks being transmitted through said plurality of output circuit devices, and phase spacing between multiple phases being maintained constant by adjusting the amount of delay in each of said output circuit devices in accordance with an output of a uniformity detection circuit that detects phase uniformity between said multi phase clocks, wherein each of said output circuit devices comprises an output circuit connected between a first power supply line and a second rower supply line via a control circuit having at least one isolating transistor, wherein

• a control voltage held at a constant level is applied to a control electrode of said isolating transistor, and
• said control voltage is a voltage at a level that works to attenuate high frequency components contained in a voltage supplied from said first or said second power supply line.

An output circuit device comprising:

• an output circuit having a plurality of buffer circuits connected to a first power supply line or a second power supply line via a corresponding control circuit having at least one isolating transistor;
• and
• a plurality of bias voltage generating circuits, corresponding to each of said plurality of buffer circuits, for supplying a control voltage having a constant level to a control electrode of said isolating transistor, said control voltage being a voltage at a level that works to attenuate high-frequency components contained in a voltage supplied from said first or said second power supply line.

An output circuit system having a plurality of output circuit devices, mufti-phase clocks being transmitted through said plurality of output circuit devices, and phase spacing between multiple phases being maintained constant by adjusting the amount of delay in each of said output circuit devices in accordance with an output of a uniformity detection circuit that detects phase uniformity between said mufti phase clocks, wherein each of said output circuit devices comprises an output circuit having a plurality of buffer circuits connected to a first power supply line or a second power supply line via a corresponding control circuit having at least one isolating transistor, wherein

• a control voltage field at a constant level is applied to a control electrode of said isolating transistor, and
• said control voltage is a voltage at a level that works to attenuate high-frequency components contained in a voltage supplied from said first or said second power supply line.

An output circuit system having a plurality of output circuit devices, multi-phase clocks being transmitted through said plurality of output circuit devices, and phase spacing between multiple phases being maintained constant by adjusting the amount of delay in each of said output circuit devices in accordance with an output of a uniformity detection circuit that detects phase uniformity between said multi-phase clocks, wherein each of said output circuit devices comprises:

• an output circuit having a plurality of buffer circuits connected to a first power supply line or a second power supply line via a corresponding control circuit having at least one isolating transistor;
• and
• a plurality of bias voltage generating circuits, corresponding to each of said plurality of buffer circuits, for supplying a control voltage having a constant level to a control electrode of said isolating transistor, said control voltage being a voltage at a level that works to attenuate high frequency component contained in a voltage supplied from said first or said second power supply line.