Memory address checking in a proccesor that support both a segmented and a unsegmented address space

An apparatus for a processor, the apparatus comprising:

• circuitry configured to perform one or more canonical checks for a data reference and a segment limit check on an effective address of the data reference;
• and
• a first circuit coupled to the circuitry and coupled to receive an indication of an operating mode of the processor and an indication of the segment corresponding to the data reference, wherein the first circuit is configured to select, responsive to the operating mode of the processor and the segment, one or more of:
• a first result of the segment limit check and a second result of the one or more canonical checks for generating an exception indication for the data reference, wherein the one or more canonical checks include a first canonical check on the effective address and a second canonical check on a linear address of the data reference, and wherein the second result is the result of the first canonical check, and a third result is the result of the second canonical check, and wherein the first circuit is further configured to select the third result for generating the exception indication responsive to the operating mode and the segment.

A method comprising:

• setting an indication in a register to a first state which prevents truncation of data reference addresses even if truncation would be performed according to an operating mode of a processor, wherein the processor includes the register;
• performing a plurality of data references to determine a size of memory included in a system;
• and
• setting the indication to a second state which allows truncation of data reference addresses according to the operating mode of the processor.

A computer readable medium comprising a plurality of instructions which, when executed, implement a method comprising:

• setting an indication in a register to a first state which prevents truncation of data reference addresses even if truncation would be performed according to an operating mode of a processor, wherein the processor includes the register;
• performing a plurality of data references to determine a size of memory included in a system;
• and
• setting the indication to a second state which allows truncation of data reference addresses according to the operating mode of the processor.

A computer system comprising:

• a memory;
• and
• at least one processor coupled to the memory, wherein the processor is configured to perform one or more canonical checks for a data reference to the memory and a segment limit check on an effective address of the data reference, wherein a canonical check is a check to ensure, for an address of the data reference, that each address bit that is not included in an implemented address space is equal to a most significant address bit that is included in the implemented address space, and wherein the processor is configured to select, responsive to an operating mode and the segment corresponding to the data reference, one or more of:
• a first result of the segment limit check and a second result of the one or more canonical checks for generating an exception for the data reference.