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US 6,807,612 B2Granted
System and method to improve speed and reduce memory allocation for set top box boot-up
AssigneesSony Corporation, Sony Electronics Inc.
InventorGregor Said Jackson
Life of this patent
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Abstract
A system and corresponding method for improving set-top box boots up efficiency while, at the same time, reducing the memory allocation required for set-top box boot-up is disclosed. The boot-up method includes performing a vertical direct memory access transfer of relevant program instructions from a system non-volatile memory to system main memory. The transferred program instructions are then re-arranged into consecutive locations within the main memory.
Claims25
An electronic apparatus comprising:
- a microprocessor;
- a first memory associated with the microprocessor;
- a second memory;
- and
- stored instructions to:
- block transfer instructions from the second memory to the first memory;
- rearrange a series of N bytes in the transferred instructions from a second memory space orientation to a first memory space orientation orthogonal to the second memory space orientation thereby forming rearranged bytes;
- and
- use the rearranged bytes to initialize the microprocessor.
6 more elements
A method comprising:
- providing an electronic apparatus comprising a microprocessor, a first memory associated with the microprocessor and a second memory;
- and
- providing instructions to perform acts comprising:
- block transferring instructions from the second memory to the first memory;
- rearranging a series of N bytes in the transferred instructions from a second memory space orientation to a first memory space orientation orthogonal to the second memory space orientation thereby forming rearranged bytes;
- and
- using the rearranged bytes to initialize the apparatus.
4 more elements
A method comprising:
- block transferring instructions from a second memory to a first memory associated with a microprocessor-based controller;
- rearranging a series of N bytes in the transferred instructions from a second memory space orientation to a first memory space orientation orthogonal to the second memory space orientation, thereby forming rearranged bytes;
- and
- using the rearranged bytes to initialize the microprocessor-based controller.
1 more element
A computer-readable medium comprising instructions to:
- block transfer instructions from a second memory to a first memory associated with a microprocessor;
- rearrange a series of N bytes in the transferred instructions from a second memory space orientation to a first memory space orientation orthogonal to the second memory space orientation thereby forming rearranged bytes;
- and
- use the rearranged bytes to initialize a microprocessor.
1 more element
Dependencies are inferred from the claim text.