Apparatus for testing I/O ports of a computer motherboard

An apparatus for testing I/O ports of a computer motherboard comprising:

• a computer motherboard under test comprising:
• a plurality of I/O ports including a parallel port and a USB port;
• a non-volatile memory for storing a test code, instead of a basic input-output system (BIOS) code, to initialize the computer motherboard under test and test the I/O ports;
• and
• a central processing unit (CPU) booting from the test code in the non-volatile memory for executing the test code to test the I/O ports of the computer motherboard under test;
• a first connector, including a plurality of parallel interface data pins, a plurality of parallel interface status pins and a plurality of parallel interface control pins, for establishing electrical connections with corresponding pins of the parallel port of the computer motherboard under test;
• a first test circuit, coupled to the first connector, comprising a logic device coupled to logically operate the parallel interface data pins and the parallel interface control pins on the first connector and to provide a set of logic signals to a portion of the parallel interface status pins on the first connector;
• a second connector, including a pair of universal serial bus (USB) interface differential data pins, for establishing electrical connections with corresponding pins of the USB port of the computer motherboard under test;
• and
• a second test circuit, coupled to the second connector, comprising:
• a first resistor connected between a first voltage source and one of the USB interface differential data pins;
• a second resistor connected between a second voltage source and the other USB interface differential data pin;
• and
• a third resistor connected between the pair of USB interface differential data pins;
• wherein the first, the second and the third resistors are connected in series.