Method for measuring PLL lock time
AssigneeTexas Instruments Incorporated
InventorAmit Kumar Premy
Life of this patent
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Abstract
A method of measuring the PLL lock time includes deriving the PLL frequency-settling function by demodulation and envelope extraction in the time domain. The PLL lock time can then be calculated from this function. Using this PLL lock time measurement method provides for very good frequency and time accuracy. Also, since for demodulation, the settled signal is used for multiplication, ATE synchronization is not required. Furthermore, since all the processing is done in the time domain, calculation times are reduced, making the process suitable for ATE environments.
Claims14
A method for measuring the lock time of a phase lock loop (PLL) that provides an output signal, comprising the steps of:
- (a) capturing the PLL output signal over a predetermined amount of time;
- (b) performing amplitude normalization on the captured PLL output signal;
- (c) dividing the captured waveform into two waveforms, y1 and y2;
- (d) multiplying the two waveforms y1 and y2 together and by a predetermined factor in order to derive a waveform, y3;
- (e) deriving the envelope of y3 in order to generate an envelope waveform y4;
- (f) performing an arccosine operation to the envelope waveform y4 in order to generate a waveform y5;
- (g) differentiating waveform y5 with respect to time in order to generate a waveform y6;
- (h) dividing waveform y6 by a predetermined amount in order to generate a waveform y7;
- and
- (i) measuring the lock time of the PLL using waveform y7.
A method for measuring the lock time of a phase lock loop (PLL) that provides an output signal, comprising the steps of:
- (a) capturing the PLL output signal over a predetermined period of time;
- (b) deriving a PLL frequency-settling function from the captured PLL output signal;
- and
- (c) determining the PLL lock time from the PLL frequency-settling function;
- wherein in step (b) the PLL frequency-settling function is derived by performing demodulation and envelope extraction of the captured PLL output signal in the time domain.
Dependencies are inferred from the claim text.