Soft-in soft-out decoder used for an iterative error correction decoder

An SISO decoder comprising:

• a plurality of metric calculators each generating a forward state metric and a backward state metric of a predetermined state for each data bit of each encoded frame;
• an extrinsic information calculator generating extrinsic information based on the forward state metric and the backward state metric;
• and
• a memory for storing the forward state metric and the backward state metric,
• wherein each of said plurality of metric calculators comprises:
• a first adder generating a branch metric when the data bit is 1, based on received data, coded data, and prior probability information, and adding the state metric, which is supplied from said memory, to the branch metric to generate an addition value;
• a second adder generating a branch metric when the data bit is 0, based on the received data, coded data, and prior probability information, and adding the state metric, which is supplied from said memory, to the branch metric to generate an addition value;
• and
• a first maximum value selector selecting the larger of the addition value generated by said first adder and the addition value generated by said second adder to generate the state metric,
• wherein said extrinsic information calculator comprises:
• a second maximum value selector adding the state metric, supplied from said memory, to each addition value generated when the forward state metric or the backward state metric, whichever is generated later, is generated by the first adder of each of said plurality of metric calculators, and selecting a largest addition value to generate a likelihood when the data bit is 1;
• a third maximum value selector adding the state metric, supplied from said memory, to each addition value generated when the forward state metric or the backward state metric, whichever is generated later, is generated by the second adder of each of said plurality of metric calculators, and selecting a largest addition value to generate a likelihood when the data bit is 0;
• a first subtracter subtracting the likelihood generated by said third maximum value selector from the likelihood generated by said second maximum value selector to generate a likelihood ratio;
• a second subtracter subtracting the data and the prior probability information from the likelihood ratio generated by said first subtracter;
• a first re-normalizer multiplying the extrinsic information generated by said second subtracter by a re-normalization coefficient to normalize the extrinsic information,
• a word length limitation circuit limiting a number of bits of the extrinsic information normalized by said first re-normalizer while changing a bit extraction position according to the number of Limes iterative decoding is executed;
• a memory circuit accumulating therein the extrinsic information whose word length is limited by said word length limitation circuit;
• and
• a second re-normalizer multiplying the extrinsic information read from the memory circuit by another re-normalization coefficient to normalize the extrinsic information, and
• wherein said memory temporarily stores therein the state metrics calculated by said plurality of metric calculators, reads the state metric of each state metric therefrom when the state metric of a next data bit is generated, outputs the state metric to the first adder and the second adder of a predetermined metric calculator and, at the same time, stores the forward state metric or the backward state metric which is generated by each of said plurality of metric calculators and whichever is generated earlier and outputs the state metric to the second maximum value selector and the third maximum value selector of said extrinsic information calculator.