US 6,807,192 B2Granted

Wireless communication system with selectively sized data transport blocks

AssigneeInterDigital Technology Corporation

InventorStephen E. Terry

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Abstract

A CDMA telecommunication system utilizes a plurality of protocol layers including a physical layer and a medium access control (MAC) layer such that the MAC layer provides data to the physical layer via plurality of transport channels (TrCHs). Each TrCH is associated with a set of logical channels. The physical layer receives blocks of data for transport such that the transport blocks (TBs) includes a MAC header and logical channel data for a selected logical channel associated with a given TrCH. Each TB has one of a selected limited finite number of TB bit sizes. The logical channel data for each TB has a bit size evenly divisible by a selected integer N greater than three (3). The MAC header for each TB has a bit size such that the MAC header bit size plus the logical channel data bit size equals one of the TB bit sizes. A fixed MAC header bit size is associated with each logical channel for a given TrCH and is selected such that each fixed MAC header bit size equals M modulo N where M is an integer greater than 0 and less than N, i.e. each MAC header for a given TrCH has a bit offset equal to M.

Claims22

Dependent claims

A CDMA telecommunication system comprising:

a plurality of protocol layers including a physical layer and a medium access control (MAC) layer such that the MAC layer provides data to the physical layer via plurality of transport channels;
each transport channel associated with a set of logical channels for transporting logical channel data within transport channel data;
at least one transport channel associated with a set of logical channels having at least two logical channels which are different logical types;
said physical layer receives blocks of data for transport such that each of the transport blocks of data includes of a MAC header and logical channel data for one of said transport channels whereby, for a given transport channel, the logical channel data is for a selected logical channel from the set of logical channels associated with the given transport channel;
each transport block having one of a selected limited finite number of transport block (TB) bit sizes;
the logical channel data for each transport block having a bit size evenly divisible by a selected integer N greater than three (3);
the MAC header for each transport block having a bit size such that the MAC header bit size plus the logical channel data bit size equals one of said TB bit sizes;
the MAC header bit size being fixed for transport blocks transporting data for the same transport channel and same selected logical channel, but may be different from the MAC header bit size for transport blocks transporting data for a different transport channel or a different selected logical channel;
and
for said at least one transport channel associated with a logical channel set having at least two (2) different types of logical channels, a fixed MAC header bit size associated with each logical channel within said set selected such that each fixed MAC header bit size equals M modulo N where M is an interger greater than 0 and less than N.

7 more elements

A method for a CDMA telecommunication system having a physical layer and a medium access control (MAC) layer, with the MAC layer providing data to the physical layer via a plurality of transport channels utilizing data transfer blocks of specific sizes for each channel, with each transport channel associated with a set of logical channels where for at least one transfer channel the set of logical channels has at least two logical channels with different logical types, the method comprising the steps of:

associating, for a given transport channel associated with a logical channel set having two (2) different types of logical channels, a fixed MAC header bit size with each logical channel within said set with each fixed MAC header bit size equal M modulo N where N is a selected integer greater than three (3) and M is an integer greater than zero (0) and less than N;
selecting a logical channel having logical-channel data for transport from a set of logical channels associated with said given transport channel, with the logical-channel data for each transport block having a bit size evenly divisible N;
and
providing the logical-channel data from the MAC layer to the physical layer via said given transport channel as a plurality of transport-blocks of data, with each transport block of data including a MAC header and logical-channel data for said transport given channel, with each transport block of data having one of a finite number of transport block (TB) bit sizes, with a first bit size of a first MAC header set to a first fixed size for transport blocks transporting data for the same transport channel and same selected logical-channel data, with the first bit size of the MAC header plus the first bit size of the logical-channel data equal to one of said TB bit sizes, and with a second bit size of a second MAC header set to a second fixed size for transport blocks transporting data for a different transport channel or different selected logical-channel data, with the second bit size of the MAC header plus the second bit size of the different logical-channel data equal to one of said TB bit sizes.

1 more element

An improvement to a CDMA telecommunication system having a physical layer and a medium access control (MAC) layer, with the MAC layer providing data to the physical layer via a plurality of transport channels utilizing data transfer blocks of specific sizes for each channel, with each transport channel associated with a set of logical channels where for at least one transfer channel the set of logical channels has at least two logical channels with different logical types, the improvement comprising:

a processor means for associating, for a given transport channel associated with a logical channel set having two (2) different types of logical channels, a fixed MAC header bit size with each logical channel within said set with each fixed MAC header bit size equal M modulo N where N is a selected integer greater than three (3) and M is an integer greater than zero (0) and less than N;
said processor means for selecting a logical channel having logical-channel data for transport from a set of logical channels associated with said given transport channel, with the logical-channel data for each transport block having a bit size evenly divisible N;
and
said processor means for providing the logical-channel data from the MAC layer to the physical layer via said given transport channel as a plurality of transport-blocks of data, with each transport block of data including a MAC header and logical-channel data for said transport given channel, with each transport block of data having one of a finite number of transport block (TB) bit sizes, with a first bit size of a first MAC header set to a first fixed size for transport blocks transporting data for the same transport channel and same selected logical-channel data, with the first bit size of the MAC header plus the first bit size of the logical-channel data equal to one of said TB bit sizes, and with a second bit size of a second MAC header set to a second fixed size for transport blocks transporting data for a different transport channel or different selected logical-channel data, with the second bit size of the MAC header plus the second bit size of the different logical-channel data equal to one of said TB bit sizes.

1 more element

a processor for associating, for a given transport channel associated with a logical channel set having two (2) different types of logical channels, a fixed MAC header bit size with each logical channel within said set with each fixed MAC header bit size equal M modulo N where N is a selected integer greater than three (3) and M is an integer greater than zero (0) and less than N;
said processor for selecting a logical channel having logical-channel data for transport from a set of logical channels associated with said given transport channel, with the logical-channel data for each transport block having a bit size evenly divisible N;
and
said processor for providing the logical-channel data from the MAC layer to the physical layer via said given transport channel as a plurality of transport-blocks of data, with each transport block of data including a MAC header and logical-channel data for said transport given channel, with each transport block of data having one of a finite number of transport block (TB) bit sizes, with a first bit size of a first MAC header set to a first fixed size for transport blocks transporting data for the same transport channel and same selected logical-channel data, with the first bit size of the MAC header plus the first bit size of the logical-channel data equal to one of said TB bit sizes, and with a second bit size of a second MAC header set to a second fixed size for transport blocks transporting data for a different transport channel or different selected logical-channel data, with the second bit size of the MAC header plus the second bit size of the different logical-channel data equal to one of said TB bit sizes.

1 more element

Dependencies are inferred from the claim text.

Facts

Application: 09/759,553Filed 12 Jan 2001 · us provisional application
Priority: 14 Jan 2000
Published: US 2001/0043576 A122 Nov 2001
Granted: 19 Oct 2004
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H04W 28/06
Traffic management, e.g. flow control or congestion control: optimizing the usage of the radio link, e.g. header compression, information sizing ,…
H04B 7/2628
At least one of which is mobile: using code-division multiple access [CDMA] or spread spectrum multiple access [SSMA]
H04B 7/2637
Using code-division multiple access [CDMA] or spread spectrum multiple access [SSMA]: for logical channel control
H04W 84/042
Large scale networks; Deep hierarchical networks: public Land Mobile systems, e.g. cellular systems