Memory device for activating one cell by specifying block and memory cell in the block
AssigneeRenesas Technology Corp.
InventorsNobuhiro Tsuda, Koji Nii, Shoji Okuda
Life of this patent
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AssigneeRenesas Technology Corp.
InventorsNobuhiro Tsuda, Koji Nii, Shoji Okuda
Estimating the term…
A memory device that consumes no wasteful power in selecting memory cells and achieves high operating speed and size and cost reductions, is provided. In reading of memory cell information, only a single memory cell in a single local block is activated through a read word line. Specifically, AND circuits are provided in correspondence with all memory cells. Each AND circuit receives as its inputs a block select signal for selecting one of the local blocks and an in-block memory cell select signal for selecting one of the memory cells in each local block in a common manner among the local blocks. The outputs from the AND circuits are applied to read word lines. Unselected memory cells are not activated and therefore no current flows from those memory cells to local read bit lines, thereby preventing wasteful power consumption.
A memory device comprising:
A memory device comprising:
Dependencies are inferred from the claim text.