Circuit configuration for driving a programmable link
AssigneeInfineon Technologies AG
InventorsRobert Kaiser, Florian Schamberger
Life of this patent
Estimating the term…
Abstract
A circuit configuration for driving a programmable link has a volatile memory cell, which is coupled to the fuse for the permanent storage of data stored in the volatile memory, and also a shift register, which enables data to be read out from the volatile memory cell and data to be written to the memory cell. In this case, a plurality of shift registers may be interconnected to form a shift register chain for the purpose of driving a plurality of fuses. The shift register chain thus enables fast writing and reading to/from the volatile memory with a low outlay on circuitry.
Claims12
A circuit configuration for driving a programmable link, comprising:
- a volatile memory having an address input and a volatile memory cell connected to said address input for feeding in an information item, said volatile memory coupled to the programmable link for permanently storing a datum from said volatile memory cell to the programmable link;
- and
- a shift register having a register cell coupled to said volatile memory cell in a read direction and in a write direction for a data transfer between said register cell and said volatile memory cell.
A memory chip, comprising:
- a programmable link;
- and
- a circuit configuration for driving said programmable link for replacing a defective memory cell with a redundant memory cell, said circuit configuration containing:
- a volatile memory having an address input and a volatile memory cell connected to said address input for feeding in an information item, said volatile memory coupled to said programmable link for permanently storing a datum from said volatile memory cell to said programmable link;
- and
- a shift register having a register cell coupled to said volatile memory cell in a read direction and in a write direction for a data transfer between said register cell and said memory cell.
A circuit configuration, comprising:
- a programmable link;
- a volatile memory having an address input and a volatile memory cell connected to said address input for feeding in an information item, said volatile memory coupled to said programmable link for permanently storing a datum in said programmable link;
- and
- a shift register having a register cell coupled to said volatile memory cell in a read direction and in a write direction for a date transfer between said register cell and said memory cell.
Dependencies are inferred from the claim text.