Nonvolatile semiconductor memory device and data write method thereof

A semiconductor integrated circuit device comprising:

• first and second electrically rewritable nonvolatile semiconductor memory cells;
• and
• a write control circuit, which supplies a plurality of programming pulses simultaneously to the first and second memory cells, the write control circuit supplies:
• a pre-programming pulse simultaneously to the first and second memory cells independently of the write statuses thereof;
• and
• staircase programming pulses, after the supply of the pre-programming pulse, simultaneously to the first and second memory cells, the staircase programming pulses having an initial voltage lower than the pre-programming pulse and increasing the voltage at a rate of a potential difference per pulse, wherein write to a memory cell that is selected from the first and second memory cells and that has been detected to reach a predetermined write status is inhibited during the supply of the staircase programming pulses.

A method of controlling a write operation of a nonvolatile semiconductor memory device comprising:

• supplying a first pre-programming pulse simultaneously to first and second memory cells that are connected to a common word line and discrete two bit lines independently of the write statuses of the first and second memory cells;
• supplying a second programming pulse, after the supply of the first pre-programming pulse, simultaneously to the first and second memory cells independently of the write statuses thereof, the second programming pulse being higher than the first pre programming pulse by a first potential difference;
• supplying a staircase programming pulses, after the supply of the second pre-programming pulse, simultaneously to the first and second memory cells, the staircase programming pulses having an initial voltage lower than the second pre-programming pulse and increasing the voltage nearly at a rate of a second potential difference per pulse, and the second potential difference being smaller than the first potential difference;
• and
• inhibiting a write operation to a memory cell that has been detected to reach a predetermined write status during supply of the staircase programming pulses.

A method of controlling a write operation of a nonvolatile semiconductor memory device comprising:

• supplying a pre-programming pulse simultaneously to first and second memory cells connected to a common word line and discrete two bit lines, respectively, independently of the write statuses of the first and second memory cells;
• and
• supplying staircase programming pulses, after the supply of the pre-programming pulse, simultaneously to the first and second memory cells, the staircase programming pulses having an initial voltage lower than the pre-programming pulse and increasing the voltage nearly at a rate of a predetermined potential difference per pulse;
• and
• inhibiting write to a memory cell that has been detected to reach a predetermined write status during supply of the staircase programming pulses.