Multi-state nonvolatile memory capable of reducing effects of coupling between storage elements

A non-volatile memory for storing data, comprising:

• an array of charge storage elements on an integrated circuit chip, characterized by values of charge stored in at least some of adjacent ones of the storage elements affecting values read from others of the storage elements due to electric field coupling between the storage elements,
• a memory for temporarily storing data to be programmed into the array of charge storage elements, and
• a programming circuit on said integrated circuit chip that writes a first set of data stored in said memory as a first set of stored values into a first group of the storage elements, thereafter writes a second set of data stored in said memory as a second set of stored values into a second set of the storage elements, wherein at least some of the stored second set of values affect values read from at least some of the first group of storage elements on account of the electric field coupling between them, and thereafter alters the first set of stored values in a manner to counteract the charge coupling effect of the second set of stored values on values read from the first group of storage elements by reading the first set of data from the first set of stored values of the first group of storage elements, rather than reading the first set of data from the memory, and thereafter rewrites the read first set of data into the first group of storage elements as the altered first set of stored values.

A non-volatile memory formed on an integrated circuit substrate, comprising:

• a plurality of conductive bit lines,
• a plurality of strings of memory cells that individually include a plurality of memory cells connected in series with each other and selectively to one of the bit lines through select transistors at ends of the string, wherein the memory cells individually include a charge storage element and the strings have lengths oriented as columns extending across the substrate in a first direction and being spaced apart in a second direction, the first and second directions being orthogonal to each other,
• a plurality of conductive word lines with lengths extending in the second direction across charge storage elements of rows of memory cells in a plurality of strings, the word lines being spaced apart in the first direction, and
• a programming circuit formed on the substrate and connectable to the bit and word lines to write a first set of data as a first set of stored values into a first group of the storage elements, thereafter writes a second set of data as a second set of stored values into a second set of the storage elements adjacent the first set, and thereafter reprograms the first set of stored values into the first group of storage elements, thereby to counteract an effect of the second set of stored values on values read from the first group of storage elements because of electric field coupling between the first and second groups of storage elements.