Ferroelectric memory device
AssigneeSeiko Epson Corporation
InventorMitsuhiro Yamamura
Life of this patent
Estimating the term…
Abstract
A plurality of word lines and a plurality of bit lines are disposed on opposite sides of a ferroelectric thin film, and each memory cell is formed by one ferroelectric capacitor. The word lines and the bit lines are driven by a word line driver section and a bit line driver section to which a plurality of types of drive voltages are supplied from a power supply circuit, and each operation mode including writing, reading, and rewriting of data is performed. A short-circuiting circuit is connected with the end portions of the word lines and the bit lines. The short-circuiting circuit short-circuits all the word lines and the bit lines after the operation mode, when turning the power on, or when turning the power off.
Claims16
A ferroelectric memory device comprising:
- a plurality of word lines disposed in parallel;
- a plurality of bit lines disposed in parallel so as to intersect the word lines;
- a plurality of ferroelectric memory cells disposed at intersecting points of the word lines and the bit lines;
- a word line driver section which drives the word lines;
- a bit line driver section which drives the bit lines;
- a first circuit which supplies a plurality of types of drive voltages to the word line driver section and the bit line driver section;
- and
- a second circuit which is connected with end portions of the word lines and end portions of the bit lines, the second circuit short-circuiting all of the word lines and the bit lines.
Dependencies are inferred from the claim text.