Enhanced storage states in an memory
AssigneesAgilent Technologies, Inc., Texas Instrument Incorporated
InventorsJurgen Thomas Rickes, Hugh Pryor McAdams, Scott Robert Summerfelt
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Abstract
A memory with mechanisms for enhancing storage states without boosting voltages to levels that damage storage cell structures. A storage cell according to the present teachings includes a storage structure capable of switching storage states. A memory according to the present teachings includes means for writing the storage cell by applying a first voltage to a first node of the storage structure and for applying a second voltage to a second node of the storage structure such that the first and second voltages have opposite polarities.
Claims20
A memory, comprising:
- storage cell having a storage structure capable of switching storage states;
- programming circuit that writes the storage cell by applying a first voltage to a first node of the storage structure and applying a second voltage to a second node of the storage structure such that the first and second voltages have opposite polarities.
A method for writing a storage cell in a memory, comprising the steps of:
- applying a first voltage to a first node of a storage structure in the storage cell;
- applying a second voltage to a second node of the storage structure such that the first and second voltages have opposite polarities.
A memory, comprising:
- storage structure having a storage node coupled to an access transistor and a node coupled to a plate line;
- programming circuit that writes the storage structure by applying a positive voltage to the access transistor and by applying a negative voltage to the plate line such that a magnitude of the negative voltage is selected to compensate for an amount of loss of the positive voltage caused by the access transistor.
Dependencies are inferred from the claim text.