Solid-state image pickup device

A solid-state image pickup device, comprising:

• a semiconductor substrate having a two-dimensional surface;
• a large number of photoelectric converter elements arranged on the surface of said semiconductor substrate in a plurality of columns with a first pitch and a plurality of rows with a second pitch, said photoelectric converter elements in each odd column being shifted about one half of the second pitch relative to said photoelectric converter elements in each even column, said photoelectric converter elements in each odd row being shifted about one half of the first pitch relative to said photoelectric converter elements in each even row, each said photoelectric converter element column including said photoelectric converter elements of only said odd rows or said even rows;
• an isolation area formed on said semiconductor substrate on a predetermined first side of each associated photoelectric converter element column, said isolation area generally extending, while locally meandering, in a direction of said photoelectric converter element column;
• a vertical charge transfer path including a semiconductor layer of first conductivity type formed on said semiconductor substrate on a second side of each associated photoelectric converter element column, the second side being opposite to the first side, said semiconductor layer generally extending, while locally meandering, in a direction of said photoelectric converter element column, and being contiguous, in every regions between adjacent two of said photoelectric converter elements in said associated photoelectric converter element column, to said isolation area for the associated column while being contiguous to another said isolation area for the column next to the associated column on the second side, said semiconductor layer having width W1 in a section in which said semiconductor layer is contiguous only to said another isolation area on the second side and width W2 in a section in which said semiconductor layer is contiguous to said isolation area on the first side and said another isolation area on the second side, said width W2 being larger than said width W1;
• and
• a readout gate region disposed between each said photoelectric converter element and adjacent vertical charge transfer path, wherein said readout gate region includes a semiconductor layer of second conductivity type having an impurity concentration lower than an impurity concentration of said semiconductor layer of second conductivity type of said isolation area, wherein said widths W2 and W1 are related to each other to satisfy a relation:
• W2−W1=(2εsε0/eNd)0.5{[Vd2Na2/(Na2+Nd)]−[Vd1Na1/(Na1+Nd)]}0.5
• wherein, εs indicates permittivity of said semiconductor layer, ε0 is free space permittivity, eVd1 is discrepancy between work functions respectively of said semiconductor layer of first conductivity type and said semiconductor layer of second conductivity type of said readout gate region before said layers are coupled with each other to form a junction therebetween, eVd2 is discrepancy between work functions respectively of said semiconductor layer of first conductivity type and said semiconductor layer of second conductivity type of said isolation area before said layers are coupled with each other to form a junction therebetween, and e indicates electric charge of an electron, Nd indicates an impurity concentration of said semiconductor layer of first conductivity type, Na2 is an impurity concentration of said semiconductor layer of second conductivity type of said isolation area, and Na1 indicates an impurity concentration of said semiconductor layer of second conductivity type of said readout gate region.

A solid-state image pickup device, comprising:

• a semiconductor substrate having a two-dimensional surface;
• a large number of photoelectric converter elements including a semiconductor region of first conductivity type, said photoelectric converter elements being arranged on the surface of said semiconductor substrate in a plurality of columns with a fixed pitch and a plurality of rows with a fixed pitch, said photoelectric converter elements in each odd column being shifted about one half of the pitch in each said column relative to said photoelectric converter elements in each even column, said photoelectric converter elements in each odd row being shifted about one half of the pitch in each said row relative to said photoelectric converter elements in each even row, each said photoelectric converter element column including said photoelectric converter elements of only said odd rows or said even rows;
• a plurality of isolation areas each formed on the surface of said semiconductor substrate between each pair of adjacent ones of said photoelectric converter element columns, each said isolation area including a semiconductor layer of second conductivity type generally extending in a direction of said photoelectric converter element column, while locally meandering;
• and
• a plurality of vertical charge transfer paths each formed between each said photoelectric converter element column and adjacent one of said isolation areas on one side of said photoelectric converter element column in a direction of said photoelectric converter element row, each said vertical charge transfer path including a semiconductor layer of first conductivity type generally extending in said photoelectric converter element column direction, while locally meandering, said vertical charge transfer path having regions with width W1 between each said photoelectric converter element of said column and said adjacent isolation area and regions with width W2 between adjacent ones of said isolation areas sandwiching said photoelectric converter element column, said width W2 being larger than said width W1.