Graphics controller for high speed transmission of memory read commands

A method for regulating the transmission of command information from a CPU to a graphics controller, comprising the steps of:

• providing a first memory;
• identifying a first command issued by the CPU;
• determining whether a condition that said first command is a memory read command is true;
• and if said condition is true,
• causing the graphics controller to store said first command in said first memory and to begin processing said first command;
• and if said condition is false,
• checking whether the graphics controller is ready to process said first command and, if the graphics controller is not ready to process said first command, continuing said checking and sending a signal to the CPU indicating that the graphics controller is ready to receive a second command from the CPU.

A state machine for regulating the transmission of command information from a CPU to a graphics controller comprising a logic circuit and a clock for clocking the logic circuit, the logic circuit operating, at any one time, in one of a plurality of states including:

• an idle state representing a state in which the graphics controller waits to receive command information from the CPU wherein, in response to the CPU having issued a first command, the logic circuit determines whether a condition that said first command is a memory read command is true and, if said condition is true, the logic circuit causes the graphics controller to store said first command in a first memory;
• a first pause state representing a first state transition from said idle state that occurs in response to the CPU having issued said first command, wherein the logic circuit has determined that said condition is false, wherein, in said first pause state, the logic circuit checks whether the graphics controller is ready to process said first command;
• and
• a first request state representing a first state transition from said first pause state, wherein said first request state further represents a second state transition from said idle state that occurs in response to the CPU having issued said first command wherein said condition is true, wherein, in said first request state, the graphics controller begins processing said first command.

A system for displaying information, the system being embodied in at least first and second chips and a graphics display device, wherein said first chip comprises a CPU for issuing a plurality of commands having associated data for display by said graphics display device, and wherein said second chip comprises:

• a first command memory;
• a data memory;
• and
• a logic circuit for communicating with said CPU and said graphics display device, and coupled to said first command memory and said data memory, wherein said CPU is adapted to control the output of said graphics display device through said logic circuit, said logic circuit being adapted to respond to a first issued command from the CPU by determining whether a condition that said first command is a memory read command is true and, if said condition is true, to cause said second chip to store said first command in said first command memory and to begin processing said first command, and, if said condition is false, to check whether said second chip is ready to process said first command and, if said second chip is not ready to process said first command, to continue said checking, and in parallel, to send a signal to the said CPU indicating that said logic circuit is ready to receive a second command.

A machine readable medium embodying a program of instructions executable by the machine to perform a method for regulating the transmission of command information from a CPU to a graphics controller, the method of regulating comprising the steps of:

• providing a first memory;
• identifying a first command issued by the CPU;
• determining whether a condition that said first command is a memory read command is true;
• and if said condition is true,
• causing the graphics controller to store said first command in said first memory and to begin processing said first command;
• and if said condition is false,
• checking whether the graphics controller is ready to process said first command and, if the graphics controller is not ready to process said first command, continuing said checking and sending a signal to the CPU indicating that the graphics controller is ready to receive a second command from the CPU.