US 6,806,780 B2 · Efficient modulation compensation of sigma delta fractional phase locked loop

Abstract

A technique is provided for achieving efficient modulation compensation of a ΣΔ fractional PLL. The parameters of the PLL TF are the gain, Kpll, of the PLL and the time constants associated with the loop filter. A careful design of the PLL allows setting the poles and zeros of the PLL TF to fixed values, independent of process and temperature. The unknown parameters of the system are then reduced to one: the PLL gain, K which is the product of the Voltage Controlled Oscillator (VCO), Phase Detector (PD) and divider gains. One unknown variable can be then determined via a single equation, that can be derived at a single frequency. The measurement of a low frequency modulated single tone, for example, is sufficient to characterize the entire PLL TF.

Claims12

Dependent claims

A method for characterizing a phase locked loop (PLL) transfer function, the method comprising the steps of:

specifying a PLL having a transfer function defined in terms of a PLL gain and a plurality of time constants associated with a loop filter;
setting the PLL transfer function poles and zeros to fixed values, independent of process and temperature variations such that unknown PLL parameters are reduced to solely the PLL gain;
measuring a low frequency modulated single frequency modulated tone signal via the PLL, and generating a perturbation response thereto;
estimating an attenuation factor based on the perturbation response;
and
characterizing the PLL transfer function associated with the attenuation factor, wherein the attenuation factor determines the PLL gain.

3 more elements

Dependencies are inferred from the claim text.

Efficient modulation compensation of sigma delta fractional phase locked loop

Life of this patent

Efficient modulation compensation of sigma delta fractional phase locked loop

Life of this patent

Abstract

Claims12