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US 6,806,761 B1Granted
Integrated charge pump circuit with low power voltage regulation
AssigneeNational Semiconductor Corporation
InventorArlo Aude
Life of this patent
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Abstract
An integrated charge pump circuit providing a regulated output voltage controlled by a voltage regulator with reduced power requirements in which the charge pump output voltage is a substantially constant multiple of the charge pump input voltage as defined by a voltage ratio which, in turn, is defined as a selected combination of a ratio of conductances of circuit elements within a feedback loop and ratios of other voltages including selected reference voltages and the charge pump input voltage.
Claims20
An apparatus including an integrated charge pump circuit providing a regulated output voltage controlled by a voltage regulator with reduced power requirements, comprising:
- an input power terminal to convey an input power voltage and an input power current;
- an input clock terminal to convey an input clock signal;
- output capacitance that responds to reception of said input power current by charging and providing an output power voltage;
- charge pump circuitry, including first and second circuit branches and coupled to said input power terminal and said output capacitance, that responds to reception of first and second clock signals with mutually exclusive signal assertion states by selectively conveying said input power current to said output capacitance alternately via said first and second circuit branches such that said output power voltage is a substantially constant multiple of said input power voltage as defined by an output ratio;
- clock signal generator circuitry, coupled to said input clock terminal and said charge pump circuitry, that responds to reception of said input clock signal and at least one control signal by providing said first and second clock signals;
- and
- control circuitry, coupled to said input power terminal, said input clock terminal, said output capacitance and said clock signal generator circuitry, that responds to reception of first and second reference voltages, said input power voltage, said input clock signal and said output power voltage by providing said at least one control signal, and includes first and second pluralities of transistors having first and second conductances, respectively, responsive to said first and second reference voltages, said input power voltage and said output power voltage, wherein
- a conductance ratio is defined by a ratio of said first and second conductances,
- a first input ratio is defined by a ratio of said first reference voltage and said input power voltage,
- a second input ratio is defined by a ratio of said second reference voltage and said input power voltage, and
- said output ratio is defined by a selected combination of said conductance ratio and said first and second input ratios.
8 more elements
An apparatus including an integrated charge pump circuit providing a regulated output voltage controlled by a voltage regulator with reduced power requirements, comprising:
- an input power terminal to convey an input power voltage and an input power current;
- an input clock terminal to convey an input clock signal;
- output capacitance that responds to reception of said input power current by charging and providing an output power voltage;
- a cross-coupled charge pump circuit, including first and second cross-coupled circuit branches and coupled to said input power terminal and said output capacitance, that responds to reception of first and second clock signals with mutually exclusive signal assertion states by selectively conveying said input power current to said output capacitance alternately via said first and second circuit branches such that said output power voltage is a substantially constant multiple of said input power voltage as defined is by an output ratio;
- a latch circuit, coupled to said input clock terminal and said cross-coupled charge pump circuit, that responds to reception of said input clock signal and first and second control signals by providing said first and second clock signals;
- and
- a dynamic signal comparator circuit, coupled to said input power terminal, said input clock terminal and said output capacitance, that responds to reception of first and second reference voltages, said input power voltage, said input clock signal and said output power voltage by providing said first and second control signals, and includes first and second pluralities of transistors having first and second conductances, respectively, responsive to said first and second reference voltages, said input power voltage and said output power voltage, wherein
- a conductance ratio is defined by a ratio of said first and second conductances,
- a first input ratio is defined by a ratio of said first reference voltage and said input power voltage,
- a second input ratio is defined by a ratio of said second reference voltage and said input power voltage, and
- said output ratio is defined by a selected combination of said conductance ratio and said first and second input ratios.
8 more elements
An apparatus including an integrated charge pump circuit providing a regulated output voltage controlled by a voltage regulator with reduced power requirements, comprising:
- output capacitor means for receiving an input power current and in response thereto charging and generating an output power voltage;
- charge pump means for receiving an input power voltage and first and second clock signals with mutually exclusive signal assertion states and in response thereto providing said input power current to said output capacitor means such that said output power voltage is a substantially constant multiple of said input power voltage as defined by an output ratio;
- clock signal generator means for receiving said input clock signal and at least one control signal and in response thereto generating said first and second clock signals;
- and
- controller means for receiving first and second reference voltages, said input power voltage, said input clock signal and said output power voltage and in response thereto generating said at least one control signal with first and second controllable circuit means having first and second conductances, respectively, responsive to said first and second reference voltages, said input power voltage and said output power voltage, wherein
- a conductance ratio is defined by a ratio of said first and second conductances,
- a first input ratio is defined by a ratio of said first reference voltage and said input power voltage,
- a second input ratio is defined by a ratio of said second reference voltage and said input power voltage, and
- said output ratio is defined by a selected combination of said conductance ratio and said first and second input ratios.
6 more elements
Dependencies are inferred from the claim text.