Circuit arrangement and method for generating a time-limited signal
AssigneeATMEL Germany GmbH
InventorUllrich Drusenthal
Life of this patent
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AssigneeATMEL Germany GmbH
InventorUllrich Drusenthal
Estimating the term…
A circuit includes a second switching unit, a first switching unit that is connected to and selectively actuates the second switching unit, and a capacitive voltage divider including first, second and third capacitances connected in series. The first and second switching units are connected respectively to first and second junctions between the first and second and the second and third capacitances respectively. An associated method involves applying a supply voltage to the voltage divider so as to charge the first and second junctions, discharging the first junction through the first switching unit, which, dependent on the voltage of the first junction, selectively actuates the second switching unit to supply an additional charging current to the second junction. A time-limited signal such as a power-on reset signal is tapped from the first or second switching unit or from the second junction. Thereafter, the circuit draws no further current.
Method for generating a time-limited signal (S1) at least at one signal output (A1) of a circuit arrangement (SA) that has at least a first Switching unit (SE1) and a second switching unit (SE2) each having an output (STA1, STA2) and an input (STE1, STE2), and a capacitive voltage divider (C1, C2, C3) with a first divider junction (K1) and a second divider junction (K2),
Circuit arrangement (SA) for performing a method for generating a time-limited signal (S1) with a first switching unit (SE1) that has a current input (STE1) and an actuating terminal (STA1), a second switching unit (SE2) that has an actuating terminal (STE2) and a current output (STA2), a first capacitive element (C1), a second capacitive element (C2), a third capacitive element (C3) and a signal output (A1),
A method of generating a time-limited signal, comprising the steps:
A circuit arrangement for generating a time-limited signal at a circuit signal output thereof, said circuit arrangement comprising:
Dependencies are inferred from the claim text.