US 6,806,745 B2Granted

Sample-and-hold amplifier circuit and pipelined A/D and D/A converters using sample hold amplification circuit

OwnerYoshihisa Fujimotoinventor

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Abstract

A sample-and-hold amplifier circuit has a switch, provided between an operational amplifier stage and an inverting amplifier stage, for connecting or cutting off the connection of the operational amplifier stage and the inverting amplifier stage. During the first operation phase (φ1), the first and second switches are switched to the φ1 side, the third switch is conductive, and the switch for connecting or cutting off the connection is nonconductive. Thus, sampling can be carried out so that first and second capacitors are charged by predetermined electrical charges. During the second operation phase (φ2), the first and second switches are switched to the φ2 side, the third switch is nonconductive, and the switch for connecting or cutting off the connection is conductive.

Claims24

Dependent claims

A load driving sample-and-hold amplification circuit, comprising:

a sampling circuit that carries out a sampling of an input signal;
and
an operational amplifier that carries out an operational amplification of the input signal that has been subjected to the sampling by the sampling circuit,
wherein the operational amplifier includes:
first and second operational amplifier stages that are connected in this order in a series manner;
a first switch, provided between an output terminal of the first operational amplifier stage and an input terminal of the second operational amplifier stage, that connects or cuts off a connection of the first and second operational amplifier stages so as to be nonconductive in a first operation phase during which the sampling is carried out and so as to be conductive in a second operation phase during which the operational amplifier, as a whole, carries out the operational amplification;
a capacitor provided between an output terminal and the input terminal of the second operational amplifier stage;
and
a second switch provided between the output terminal of the second operational amplifier stage and a load, means for causing the second switch to connect or cut off a connection of the second operational amplifier stage and the load wherein the means causes the second switch to be conductive in the first operation phase and nonconductive in the second operation phase so that the second switch is conductive when the first switch is nonconductive, and vice versa, whereby driving time of amplification differs from drive time of the load so that low power consumption is realized.

6 more elements

A load driving sample-and-hold amplification circuit, comprising:

a sampling circuit that carries out a sampling of an input signal;
and
an operational amplifier that carries out an operational amplification of the input signal that has been subjected to the sampling by the sampling circuit,
wherein the operational amplifier includes:
multiple operational amplifier stages that are connected with each other in a series manner;
a first switch that:
(a) connects or cuts off a connection of the operational amplifier stages, (b) is nonconductive during a first operation phase during which the sampling is carried out, and (c) is conductive in a second operation phase during which the operational amplification is carried out by the operational amplifier as a whole, said first switch being provided between neighboring first and second operational amplifier stages so as to be provided between an output terminal of the first operational amplifier stage and an input terminal of the second operational amplifier stage;
capacitors coupled to an output terminal of a final operational amplifier stage so that at least one of the capacitors is provided between the output terminal of the final operational amplifier stage and the input terminal of the second operational amplifier stage;
and
a second switch provided between the output terminal of the final operational amplifier stage and a load, the second switch connecting or cutting off a connection of the final operational amplifier stage and the load so as to be conductive in the first operation phase and nonconductive in the second operation phase.

7 more elements

A pipelined A/D converter, comprising:

first sub-A/D converter blocks, connected with each other in a series manner, that each directly receive a clock signal and include (a) a sub-A/D converter that converts an input signal into a predetermined-numbered bit information and (b) a sub-operational-circuit which converts the bit information into an analog value, carries out an operational amplification with respect to a difference between the analog value and the input signal so as to output the difference that has been subjected to the operational amplification, and
a second sub-A/D converter block that includes a sub-A/D converter which converts an output signal of the first sub-A/D converter block of a final stage into a remainder of the bit information,
said sub-operational-circuit being a sample-and-hold amplifier circuit that includes:
a sampling circuit that carries out a sampling of the input signal;
and
an operational amplifier that carries out an operational amplification of the input signal that has been subjected to the sampling by the sampling circuit,
said operational amplifier including:
first and second operational amplifier stages that are connected in this order in a series manner;
a switch, provided between an output terminal of the first operational amplifier stage and an input terminal of the second operational amplifier stage, that connects or cuts off a connection of the first and second operational amplifier stages so as to be nonconductive in a first operation phase during which the sampling is carried out and so as to be conductive in a second operation phase during which the operational amplifier, as a whole, carries out the operational amplification;
and
a capacitor provided between an output terminal and the input terminal of the second operational amplifier stage.

8 more elements

A pipelined A/D converter, comprising:

at least one first sub-A/D converter blocks, connected with each other in a series manner, wherein each of the at least one first sub-A/D converter block(s) include (a) a sub-A/D converter that converts an input signal into a predetermined-numbered bit information and (b) a sub-operational-circuit which converts the bit information into an analog value, carries out an operational amplification with respect to a difference between the analog value and the input signal so as to output the difference that has been subjected to the operational amplification, and
a second sub-A/D converter block that includes a sub-A/D converter which converts an output signal of the first sub-A/D converter block of the final stage into a remainder of the bit information,
said sub-operational-circuit being a sample-and-hold amplifier circuit that includes:
a sampling circuit that carries out a sampling of the input signal;
and
an operational amplifier that carries out an operational amplification of the input signal that has been subjected to the sampling by the sampling circuit,
said operational amplifier including:
multiple operational amplifier stages that are connected with each other in a series manner;
a switch, that (a) connects or cuts off a connection of the operational amplifier stages, (b) is nonconductive during the first operation phase during which the sampling is carried out, and (c) is conductive in the second operation phase during which the operational amplification is carried out by the operational amplifier as a whole, said switch being provided between neighboring first and second operational amplifier stages so as to be provided between an output terminal of the first operational amplifier stage and an input terminal of the second operational amplifier stage;
and
capacitors operatively associated with an output terminal of a final operational amplifier stage so that at least one of the capacitors is provided between the output terminal of the final operational amplifier stage and at least the input terminal of the second operational amplifier stage.

8 more elements

A pipelined D/A converter, comprising:

a plurality of sample-and-hold amplifier circuits that are connected with each other in a series manner and each is used as a sub-D/A converter that converts a predetermined-numbered bit information of a digital signal into an analog value, each of the sample-and-hold circuits directly receiving a clock signal,
the sub-D/A converter carrying out an operational amplification with respect to an analog input signal and said analog value that corresponds to the predetermined-numbered bit information and sending the result of amplification to a sub-D/A converter of the next stage so that the sub-D/A converter of the final stage outputs an analog signal corresponding to the digital signal,
at least one of the sample-and-hold amplifier circuits including:
a sampling circuit that carries out a sampling of an input signal;
and
an operational amplifier that carries out an operational amplification of the input signal that has been subjected to the sampling by the sampling circuit,
the operational amplifier including:
first and second operational amplifier stages that are connected in this order in a series manner;
a switch, provided between an output terminal of the first operational amplifier stage and an input terminal of the second operational amplifier stage, that connects or cuts off a connection of the first and second operational amplifier stages so as to be nonconductive in a first operation phase during which the sampling is carried out and so as to be conductive in a second operation phase during which the operational amplifier, as a whole, carries out the operational amplification;
and
a capacitor provided between an output terminal and the input terminal of the second operational amplifier stage.

8 more elements

A pipelined D/A converter, comprising:

a plurality of sample-and-hold amplifier circuits that are connected with each other in a series manner and each is used as a sub-D/A converter that converts a predetermined-numbered bit information of a digital signal into an analog value;
the sub-D/A converter carrying out an operational amplification with respect to an analog input signal and said analog value that corresponds to the predetermined-numbered bit information and send the result of amplification to a sub-D/A converter of the next stage so that the sub-D/A converter of the final stage outputs an analog signal corresponding to the digital signal,
at least one of the sample-and-hold amplifier circuits including:
a sampling circuit that carries out a sampling of an input signal;
and
an operational amplifier that carries out an operational amplification of the input signal that has been subjected to the sampling by the sampling circuit,
said operational amplifier including:
multiple operational amplifier stages that are connected with each other in a series manner;
a switch, that (a) connects or cuts off a connection of the operational amplifier stages, (b) is conductive during the first operation phase during which the sampling is carried out, and (c) is nonconductive in the second operation phase during which the operational amplification is carried out by the operational amplifier as a whole, said switch being provided between neighboring first and second operational amplifier stages so as to be provided between an output terminal of the first operational amplifier stage and an input terminal of the second operational amplifier stage;
and
capacitors coupled to an output terminal of a final operational amplifier stage so that at least one of the capacitors is provided between the output terminal of the final operational amplifier stage and the input terminal of the second operational amplifier stage.

8 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/609,626Filed 1 Jul 2003 · division
Priority: JP 2000-25805428 Aug 2000
Published: US 2004/0061637 A11 Apr 2004
Granted: 19 Oct 2004
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

H03M 1/442
Sequential comparisons in series-connected stages with change in value of analogue signal: using switched capacitors
G11C 27/026
Using a capacitive memory element: associated with an amplifier
H03F 3/45977
By using a feedback circuit: using switching means, e.g. sample and hold
H03K 5/2481
Using field effect transistors: with at least one differential stage

Family

Application09/932,025Parent of this division · filed 20 Aug 2001
US 2004/0061637 A1Pre-grant publication · published 1 Apr 2004
US 6,608,504 B2Parent of this division
US 2002/0024363 A1Published application
US 6,806,745 B2This patent

From the US filing history. Foreign family members aren’t listed.