Fuse construction for integrated circuit structure having low dielectric constant dielectric material
AssigneeLSI Logic Corporation
InventorsYauh-Ching Liu, Ruggero Castagnetti, Ramnath Venkatraman
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AssigneeLSI Logic Corporation
InventorsYauh-Ching Liu, Ruggero Castagnetti, Ramnath Venkatraman
Estimating the term…
Fuses, and optionally metal pads, are formed over a layer of low k dielectric material structure having first openings lined with conductive barrier material and filled to form metal interconnects in the upper surface of the low k dielectric material. A dielectric layer is formed over the low k dielectric material and over the metal interconnects, and patterned to form second openings therein communicating with the metal interconnects. A conductive barrier layer is formed over this dielectric layer in contact with the metal interconnects, and patterned to form fuse portions between some of the metal interconnects, and a liner over one or more of the metal interconnects. A dielectric layer is then formed over the patterned conductive barrier layer to form a window above each fuse, and patterned to form openings over at least some of the conductive barrier liners filled with metal to form metal pads.
An integrated circuit structure which includes fuses formed over a low k dielectric layer comprising:
An integrated circuit structure which includes fuses formed over a low k dielectric layer in said integrated circuit structure, said integrated circuit structure comprising:
Dependencies are inferred from the claim text.