Method of forming a dual damascene structure using an amorphous silicon hard mask

A method of forming a dual damascene structure, said method comprising:

• providing a substrate having a first interconnect layer formed thereon;
• forming a barrier dielectric layer over said first interconnect layer;
• forming a silicon-containing via dielectric layer over said barrier dielectric layer;
• forming a porous low dielectric constant layer over said via dielectric layer;
• depositing a two layer hard mask over said porous low dielectric constant layer, the hard mask consisting of a bottom layer deposited directly on the porous low dielectric constant layer and a top amorphous silicon layer;
• forming a first antireflective coating directly over said top hard mask layer;
• forming a photoresist layer over said first antireflective coating;
• patterning said photoresist layer in accordance with a metal wiring pattern to expose selected portions of said first antireflective coating;
• etching said first antireflective layer to transfer said metal wiring pattern from said photoresist layer to said first antireflective coating;
• etching said top hard mask layer to transfer said metal wiring pattern to said top hard mask layer,
• removing said photoresist layer and said first antireflective coating;
• forming a second antireflective coating over said patterned top hard mask layer;
• forming a second photoresist layer over said second antireflective coating;
• patterning said second photoresist layer in accordance with a via pattern to expose selected portions of said second antireflective coating;
• etching a via hole through said second antireflective coating, said top and bottom hard mask layers and at least into said porous low dielectric constant layer;
• removing said second photoresist layer and said second antireflective coating;
• etching said metal wiring pattern into said bottom hard mask layer and said porous low dielectric constant layer and transferring said via pattern into said via dielectric layer;
• and
• etching through said barrier dielectric layer in said via to expose portions of said first interconnect layer.

A method of forming a dual damascene structure on a substrate having a dielectric layer already formed thereon, said method comprising:

• forming an intermetal dielectric structure comprising one or more dielectric layers over the substrate;
• depositing a hard mask structure consisting of a bottom hard mask layer and a top amorphous silicon layer over the intermetal dielectric structure;
• etching a trench and a via in the intermetal dielectric structure by forming a first photoresist layer over the hard mask structure, patterning the first photoresist layer according to a first pattern;
• transferring the first pattern into the amorphous silicon hard mask layer while using the bottom hard mask layer as an etch stop and depositing a second photoresist layer over the substrate prior to etching through the bottom hard mask layer.