Structure of semiconductor electronic device and method of manufacturing the same
AssigneeOki Electric Industry Co., Ltd.
InventorLiu Guo Lin
Life of this patent
Estimating the term…
Abstract
In order to prevent silicides from getting under side walls when the silicides are formed over MOSFET formed over an SOI substrate, trenches are defined in the SOI substrate and side walls are formed over the trenches, whereby the silicides are blocked so as not to get under a gate insulator with a lower portion of each side wall as a structure convex in a downward direction of the substrate. Thus, an increase in gate withstand voltage, a decrease in gate leakage current and control on a short channel effect are achieved.
Claims13
A method of manufacturing a scmiconductor electronic device, comprising the following steps:
- a step for forming a gate electrode of a field effect transistor over a substrate;
- a step for forming first side walls over sides of said gate electrode on a self-alignment basis respectively;
- a step for performing over etching and etching edges of said first side walls by using trenching effects at the edges of said first side walls until said substrate is exposed;
- a step for subjecting the exposed substrate to thermal oxidation to thereby form an oxide film substantially identical in quality to a gate oxide film;
- and
- a step for forming second side walls over side walls of said first side walls;
- and wherein said respective steps are successively executed.
A method of manufacturing a semiconductor electronic device, comprising the following steps:
- a step for forming a gate electrode of a field effect transistor over a substrate;
- a step for forming first side walls over sides of said gate electrode on a self-alignment basis respectively;
- a step for performing over etching and etching edges of said first side walls by using trenching effects at the edges of said first side walls until said substrate is exposed;
- a step for further etching said exposed substrate;
- a step for forming an oxidc film on said exposed substrate substantially identical in quality to a gate oxide film by thermal oxidation;
- and
- a step for forming second side walls over side walls of said first side walls;
- and wherein said respective steps are successively executed.
A method of manufacturing a semiconductor electronic device, comprising the following steps:
- a step for forming an SiO2 film over a substrate;
- a step for forming Poly-Si or amorphous Si over said SiO2 film;
- a step for patterning said Poly-Si or amorphous Si by known photolithography and etching;
- a step for selectively growing an Si film over the surface of said Poly-Si or amorphous Si;
- a step for performing etching with the selectively grown Si film as a mask to thereby remove said SiO2 film;
- a step for further performing etching to thereby define trenches in said substrate;
- a step for removing the selectively grown Si film and said Poly-Si or amorphous Si;
- a step for forming a gate electrode of MOSFET within a region interposed between the trenches defined in said substrate;
- and
- a step for forming side walls over sides of said gate electrode and burying the trenches defined in said substrate by lower portions of said formed side walls.
A method of manufacturing a semiconductor electronic device, comprising the following steps:
- a step for defining trenches in a substrate by known photolithography and etching;
- a step for forming an Si film over said substrate by selective epitaxial growth of Si to thereby adjust the depth and width of said each trench;
- a step for forming a gate electrode of MOSFET within a region interposed between the trenches defined in said substrate;
- and
- a step for forming side walls over sides of said gate electrode and burying the trenches defined in said substrate by lower portions of said formed side walls.
A method of manufacturing a semiconductor electronic device, comprising the following steps:
- a step for forming a gate electrode over a substrate;
- a step for forming first side walls over sides of said gate electrode;
- a step for depositing Poly-Si or amorphous Si over said substrate;
- a step for performing anisotropic dry etching of Si to leave said Poly-Si or amorphous Si equivalent to less than or equal to one-half the height of said each first side wall over side walls of said first side walls, thereby forming second side walls;
- a step for next forming a metal film and forming silicides by heat treatment.
Dependencies are inferred from the claim text.