Semiconductor device and method for fabricating the same
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorMizuki Segawa
Life of this patent
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Abstract
A gate insulating film, a gate electrode, a gate-top protection film, LDD layers and nitride film sidewalls are formed on a semiconductor substrate. Source/drain regions are formed in the semiconductor substrate. After deposition of an interlayer insulating film on the resultant substrate, a hole is formed through the interlayer insulating film and the gate-top protection film to reach the gate electrode, and a gate contact is formed by filling the hole. The gate-top protection film has an opening exposing part of a portion of the area on the top surface of the gate electrode other than the region in contact with the gate contact. This facilitates external diffusion of hydrogen during annealing, or recovery from a fixed level and a damage layer during sintering.
Claims18
A method for fabricating a semiconductor device, comprising the steps of:
- (a) forming a gate insulating film on a semiconductor substrate;
- (b) depositing a conductive film on the gate insulating film;
- (c) forming a silicon nitride film covering both surfaces of the semiconductor substrate after step (b);
- (d) patterning the conductive film and a portion of the silicon nitride film located on the principal plane side of the semiconductor substrate to form a gate electrode and a gate-top protection film;
- (e) implanting impurity ions in the semiconductor substrate to form source/drain regions after the step (d);
- (f) performing annealing for activation of the impurities implanted in the source/drain regions;
- and
- (g) removing a portion of the silicon nitride film located on the back side of the semiconductor substrate after step (c) and before step (f).
A method for fabricating a semiconductor device, comprising the steps of:
- (a) forming a gate insulating film on a semiconductor substrate;
- (b) depositing a conductive film on the gate insulating film;
- (c) forming a silicon nitride film covering the principal plane of the semiconductor substrate after step (b);
- (d) patterning the silicon nitride film and the conductive film to form a gate-top protection film and a gate electrode;
- (e) implanting impurity ions in the semiconductor substrate to form source/drain regions after step (d);
- (f) forming an opening on the gate-top protection film by exposing a region in contact with the sate contact and a part of a region other than the region in contact with the gate contact, in an area located on the toy surface of the gate electrode, after step (e);
- (g) performing annealing for activation of the impurities implanted in the source/drain regions after step (f);
- (h) forming an interlayer insulating film on the resultant substrate after step (g);
- and
- (i) forming source/drain contact holes through the interlayer insulating film to reach the source/drain regions, the source/drain contact holes overlapping a part of the top surface of the gate electrode,
- wherein in step (f), portions are retained at least in a region where the source/drain contact holes overlap the gate electrode in the gate-top protection film.
A method for fabricating a semiconductor device, comprising the steps of:
- (a) forming a gate insulating film on a semiconductor substrate;
- (b) depositing a conductive film on the gate insulating film;
- (c) forming a silicon nitride film covering the principal plane of the semiconductor substrate after step (b);
- (d) patterning the silicon nitride film and the conductive film to form a gate-top protection film and a gate electrode;
- (e) implanting impurity ions in the semiconductor substrate to form source/drain regions after step (d);
- (f) forming an interlayer insulating film on the resultant substrate after step (e);
- (g) forming a contact hole through the interlayer insulating film and the gate-top protection film to reach the gate electrode;
- and
- (h) performing heat treatment for activation of the impurities implanted in the source/drain regions after step (g);
- wherein in the step (g), at least a gate contact hole and a dummy contact hole are formed as the contact hole,
- the gate contact hole is a hole to be filled with a contact member used for supply of a voltage to the gate electrode, and
- the dummy contact hole is a hole to be filled with a dummy contact member that is not used for supply of a voltage to the gate electrode.
A method for fabricating a semiconductor device, comprising:
- (a) forming a gate insulating film on a semiconductor substrate;
- (b) forming a gate electrode on the gate insulating film;
- (c) forming a silicon nitride film covering a principal plane side and a back side of the semiconductor substrate after step (b);
- (d) implanting impurity ions in the semiconductor substrate to form source/drain regions after step (c);
- (e) performing annealing for activation of the impurities implanted in the source/drain regions;
- and
- (f) removing a first silicon nitride film located on the back side of the semiconductor substrate in the silicon nitride film after step (c) and before the step (e).
Dependencies are inferred from the claim text.