Method of manufacturing a semiconductor device using a two-step deposition process
AssigneeSamsung Electronics Co., Ltd.
InventorsHyun-Seok Lim, In-Sun Park, Sang-Bum Kang, Jong-sik Chun, Seong-Geon Park, In-Su Ha
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Abstract
The present invention discloses a method of manufacturing a semiconductor device having an upper capacitor electrode and a node resistor, including depositing a thin film at a first deposition rate on an edge portion of a wafer and at a second deposition rate on a central portion of the wafer to form the upper capacitor electrode and the node resistor, thereby improving step coverage of the upper capacitor electrode while simultaneously improving resistance distribution of the node resistor.
Claims17
A method of manufacturing a semiconductor device having an upper capacitor electrode and a node resistor comprising:
- depositing a thin film at a first deposition rate on an edge portion of a wafer and at a second deposition rate on a central portion of the wafer to form the upper capacitor electrode and the node resistor,
- wherein a portion of the thin film corresponding to the central portion of the wafer is deposited to a thickness greater than a thickness of a portion of the thin film corresponding to the edge portion of the wafer.
A method of manufacturing a semiconductor device comprising:
- depositing a first titanium nitride layer under a deposition condition that promotes excellent step coverage;
- and
- depositing a second titanium nitride layer under a deposition condition that promotes uniform resistance distributions,
- wherein the second titanium nitride layer is deposited under a deposition condition so that a portion of the second titanium nitride layer corresponding to a central portion of a wafer is deposited to a thickness greater than a portion of the second titanium nitride layer corresponding to an edge portion of a wafer.
Dependencies are inferred from the claim text.