Method and apparatus for constraining tap coefficients in an adaptive finite impulse response filter

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising:

• coefficient supply circuitry disposed to provide at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint circuitry which selectively constrains changes in the values of at least one of the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint circuitry constrains the odd tap coefficients by orthogonal projection;
• and
• sub-sampling circuitry disposed to provide to said constraint circuitry sub-samples of an adaptive Finite Impulse Response filter output signal.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising:

• coefficient supply circuitry disposed to provide at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint circuitry which selectively constrains changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint circuitry constrains the even tap coefficients such that C0−C2+C4−C6=0,
• wherein said constraint circuitry constrains the even tap coefficients such that C2 and C4 are coupled.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising:

• coefficient supply circuitry disposed to provide at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint circuitry which selectively constrains changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients.
• wherein said constraint circuitry constrains the even tap coefficients such that C0−C2+C4−C6=0,
• wherein said constraint circuitry constrains the even tap coefficient such that C2 and C4 are coupled, and such that C0 and C6 are coupled.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising:

• coefficient supply circuitry disposed to provide at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint circuitry which selectively constrains changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint circuitry constrains the even tap coefficients such that C0−C2+C4−C6=0,
• wherein said constraint circuitry constrains the even tap coefficient such that C0, C2, C4, and C6 are coupled.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising:

• coefficient supply circuitry disposed to provide at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint circuitry which selectively constrains changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint circuitry constrains the odd tap coefficients such that C1−C3+C5=a constant,
• wherein said constraint circuitry constrains the odd tap coefficients such that C1 and C5 are coupled.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising:

• coefficient supply circuitry disposed to provide at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint circuitry which selectively constrains changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint circuitry constrains the even tap coefficients but not the odd tap coefficients.

Apparatus for constraining adaptation coefficients in an equalizer, comprising:

• sub-sampling circuitry coupled to the equalizer to output sub-samples of equalizer output signals;
• quantizing circuitry coupled to said sub-sampling circuitry to output quantized, sub-sampled output signal;
• and
• constraining circuitry disposed to constrain the adaptation coefficients of the equalizer by applying a constant orthogonal projection matrix to the quantized, sub-sampled output signals.

Equalizer circuitry comprising:

• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• a coefficient supplier coupled to provide coefficients to said taps,
• wherein even tap coefficients are grouped into a plurality of groups of even tap coefficients and odd tap coefficients are grouped into a plurality of groups of odd tap coefficients;
• and
• adaptive circuitry coupled to change the coefficients supplied by said coefficient supplier in accordance with changes in an output of the Finite Impulse Response filter, said adaptive circuitry including circuitry coupled to constrain allowable changes in both the even tap coefficients C0, C2, C4, C6 in at least one of the plurality of groups of even tap coefficients and in the odd tap coefficients C1, C3, C5 in at least one of the plurality of groups of odd tap coefficients,
• wherein a change in value of tap coefficients in a group of tap coefficients is independent of changes in values of tap coefficients in other groups of tap coefficients.

Equalizer circuitry comprising:

• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and
• a coefficient supplier coupled to provide coefficients to said taps, and
• adaptive circuitry coupled to change the coefficients supplied by said coefficient supplier in accordance with changes in an output of the Finite Impulse Response filter, said adaptive circuitry including circuitry coupled to constrain allowable changes in both the even tap coefficients C0, C2, C4, C6 and in the odd tap coefficients C1, C3, C5,
• wherein said adaptive circuitry constrains the even coefficients such that C2 and C4 change by substantially the same amount.

Equalizer circuitry comprising:

• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6,
• a coefficient supplier coupled to provide coefficients to said taps, and
• adaptive circuitry coupled to change the coefficients supplied by said coefficient supplier in accordance with changes in an output of the Finite Impulse Response filter, said adaptive circuitry including circuitry coupled to constrain allowable changes in both the even tap coefficients C0, C2, C4, C6 and in the odd tap coefficients C1, C3, C5,
• wherein said adaptive circuitry constrains the odd tap coefficients such that C1 and C5 are coupled.

Equalizer circuitry comprising:

• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• a coefficient supplier coupled to provide coefficients to said taps, and
• adaptive circuitry coupled to change the coefficients supplied by said coefficient supplier in accordance with changes in an output of the Finite Impulse Response filter, said adaptive circuitry including circuitry coupled to constrain allowable changes in both the even tap coefficients C0, C2, C4, C6 and in the odd tap coefficients C1, C3, C5,
• wherein said adaptive circuitry constrains the even tap coefficients but not the odd tap coefficients.

Equalizer circuitry comprising:

• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• a coefficient supplier coupled to provide coefficients to said taps, and
• adaptive circuitry coupled to change the coefficients supplied by said coefficient supplier in accordance with changes in an output of the Finite Impulse Response filter, said adaptive circuitry including circuitry coupled to constrain allowable changes in both the even tap coefficients C0, C2, C4, C6 and in the odd tap coefficients C1, C3, C5,
• wherein said adaptive circuitry constrains the odd tap coefficients but not the even tap coefficients.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising;

• coefficient supply means for providing at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter,
• wherein the at least two even tap coefficients are grouped into a plurality of groups of even tap coefficients and the at least two odd tap coefficients are grouped into a plurality of groups of odd tap coefficients;
• and
• constraint means for selectively constraining changes in the values of at least one of (i) even tap coefficients in at least one of the plurality of groups of even tap coefficients and (ii) odd tap coefficients in at least one of the plurality of groups of odd tap coefficients, p2 wherein a change in value of tap coefficients in a group of tap coefficients is independent of changes in values of tap coefficients in other groups of tap coefficients.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising;

• coefficient supply means for providing at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint means for selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint means constrains the odd tap coefficients by orthogonal projection;
• and
• sub-sampling means for providing to said constraint circuitry sub-samples of an adaptive Finite Impulse Response filter output signal.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising,

• coefficient supply means for providing at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint means for selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint means constrains the even tap coefficients such that C0−C2+C4−C6=0,
• wherein said constraint means constrains the even tap coefficients such that C2 and C4 are coupled.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising;

• coefficient supply means for providing at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint means for selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint means constrains the even tap coefficients such that C0−C2+C4−C6=0,
• wherein said constraint means constrains the even tap coefficients such that C2 and C4 are coupled, and such C0 and C6 are coupled.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising:

• coefficient supply means for providing at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint means for selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint means constrains the even tap coefficients such that C0−C2+C4−C6=0,
• wherein said constraint means constrains the even tap coefficients such that C0, C2, C4, and C6 are coupled.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising;

• coefficient supply means for providing at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter, and
• constraint means for selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint means constrains the odd tap coefficients such that C1−C3+C5=a constant,
• wherein said constrain means constrains the odd tap coefficients such that C1 and C5 are coupled.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising;

• coefficient supply means for providing at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint means for selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint means constrains the even tap coefficients but not the odd tap coefficients.

Apparatus for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising;

• coefficient supply means for providing at least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• constraint means for selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraint means constrains the odd tap coefficients but not the even tap coefficients.

Apparatus for constraining adaptation coefficients in an equalizer, comprising:

• sub-sampling means for outputting sub-samples of equalizer output signals;
• quantizing means for outputting quantized, sub-sampled output signals;
• and
• constraining means for constraining the adaptation coefficients of the equalizer by applying a constant orthogonal projection matrix to the quantized, sub-sampled output signals.

Equalizer circuitry comprising:

• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• coefficient supply means for providing coefficients to said taps,
• wherein even tap coefficients are grouped into a plurality of groups of even tap coefficients and odd tap coefficients are grouped into a plurality of groups of odd tap coefficients;
• and
• adaptive means for changing the coefficients supplied by said coefficient supply means in accordance with changes in an output of the Finite Impulse Response filter, said adaptive means including constraining means for constraining allowable changes in both the even tap coefficients C0, C2, C4, C6 in at least one of the plurality of groups of even tap coefficients and in the odd tap coefficients C1, C3 C5 in at least one of the plurality of groups of odd tap coefficients,
• wherein a change in tap coefficients in a group of tap coefficients is independent of changes in tap coefficients in other groups of tap coefficients.

Equalizer circuitry, comprising:

• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• coefficient supply means for providing coefficients to said taps, and
• adaptive means for changing the coefficients supplied by said coefficient supply means in accordance with changes in an output of the Finite Impulse Response filter, said adaptive means including constraining means for constraining allowable changes in both the even tap coefficients C0, C2, C4, C6 and in the odd tap coefficients C1, C3 C5,
• wherein said constraining means constrains the even tap coefficients such that C2 and C4 change by substantially the same amount.

Equalizer circuitry, comprising:

• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• coefficient supply means for providing coefficients to said taps;
• and
• adaptive means for changing the coefficients supplied by said coefficient supply means in accordance with changes in an output of the Finite Impulse Response filter, said adaptive means including constraining means for constraining allowable changes in both the even tap coefficients C0, C2, C4, C6 and in the odd tap coefficients C1, C3 C5,
• wherein said constraining means constrains the odd tap coefficients such that C1 and C5 are coupled.

Equalizer circuitry, comprising:

• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• coefficient supply means for providing coefficients to said taps;
• and
• adaptive means for changing the coefficients supplied by said coefficient supply means in accordance with changes in an output of the Finite Impulse Response filter, said adaptive means including constraining means for constraining allowable changes in both the even tap coefficients C0, C2, C4, C6 and in the odd tap coefficients C1, C3 C5,
• wherein said constraining means constrains the even tap coefficients but not the odd tap coefficients.

Equalizer circuitry, comprising:

• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• coefficient supply means for providing coefficients to said taps;
• and
• adaptive means for changing the coefficients supplied by said coefficient supply means in accordance with changes in an output of the Finite Impulse Response filter, said adaptive means including constraining means for constraining allowable changes in both the even tap coefficients C0, C2, C4, C6 and in the odd tap coefficients C1, C3 C5,
• wherein said constraining means constrains the odd tap coefficients but not the even tap coefficients.

A method for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filters,
• wherein the at least two even tap coefficients are grouped into a plurality of groups of even tap coefficients and the at least two odd tap coefficients are grouped into a plurality of groups of odd tap coefficients;
• and
• selectively constraining changes in the values of at least one of (i) even tap coefficients in at least one of the plurality of groups of even tap coefficients and (ii) odd tap coefficients in at least one of the plurality of groups of odd tap coefficients,
• wherein a change in value of tap coefficients in a group of tap coefficients is independent of changes in values of tap coefficients in other groups of tap coefficients.

A method for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraining step constrains the odd tap coefficients by orthogonal projection;
• and
• sub-sampling an adaptive Finite Impulse Response filter output signal to provide to said constraint step sub-samples of the adaptive Finite Impulse Response filter output signal.

A method for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraining step constrains the even tap coefficients such that C0−C2+C4−C6=0,
• wherein said constraining step constrains the even tap coefficients such that C2 and C4 are coupled.

A method for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraining step constrains the even tap coefficients such that C0−C2+C4−C6=0,
• wherein said constraining step constrains the even tap coefficients is such that C2 and C4 are coupled, and such that C0 and C6 are coupled.

A method for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraining step constrains the even tap coefficients such that C0−C2+C4−C6=0,
• wherein said constraining step constrains the even tap coefficients such that C0, C2, C4, and C6 are coupled.

A method for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraining step constrains C1, C3, and C5 by application of a constant orthogonal projection matrix,
• wherein said constraining step constrains the odd tap coefficients such that C1 and C5 are coupled.

A method for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraining step constrains the even tap coefficients but not the odd tab coefficients.

A method for constraining tap coefficients in an adaptive Finite Impulse Response filter, comprising the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive Finite Impulse Response filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein said constraining step constraints the odd tap coefficients but not the even tap coefficients.

A method for constraining adaptation coefficients in an equalizer, comprising:

• a sub-sampling step for outputting sub-samples of equalizer output signals;
• a quantizing step for outputting quantized, sub-sampled output signals;
• and
• a constraining step for constraining the adaptation coefficients of the equalizer by applying a constant orthogonal projection matrix to the quantized, sub-sampled output signals.

A method of operating an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6, comprising the steps of:

• a coefficient supply step for supplying coefficients to the taps,
• wherein even tap coefficients are grouped into a plurality of groups of even tap coefficients and odd tap coefficients are grouped into a plurality of groups of odd tap coefficients;
• and
• an adaptive step for changing the coefficients supplied by said coefficient supply step in accordance with changes in an output of the Finite Impulse Response filter, said adaptive step including a step for constraining allowable changes in both the even coefficients C0, C2, C4, C6 in at least one of the plurality of groups of even tap coefficients and in the odd coefficients C1, C3, C5 in at least one of the plurality of groups of odd tap coefficients,
• wherein a change in tap coefficients in a group of tap coefficients is independent of changes in tap coefficients in other groups of tap coefficients.

A method of operating an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6, comprising the steps of:

• a coefficient supply step for supplying, coefficients to the taps;
• and
• an adaptive step for changing the coefficients supplied by said coefficient supply step in accordance with changes in an output of the Finite Impulse Response filter, said adaptive step including a step for constraining allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said constraining step constrains the even coefficients such that C2 and C4 change by substantially the same amount.

A method of operating an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6, comprising the steps of:

• a coefficient supply step for supplying coefficients to the taps;
• and
• an adaptive step for changing the coefficients supplied by said coefficient supply step in accordance with changes in an output of the Finite Impulse Response filter, said adaptive step including a step for constraining allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said constraining step constrains the even coefficients such that C0 and C6 change by substantially the same amount.

A method of operating an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6, comprising the steps of:

• a coefficient supply step for supplying coefficients to the taps;
• and
• an adaptive step for chanting the coefficients supplied by said coefficient supply step in accordance with changes in an output of the Finite Impulse Response filter, said adaptive step including a step for constraining allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said constraining step constrains the even tap coefficients but not the odd tap coefficients.

A method of operating an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6, comprising the steps of:

• a coefficient supply step for supplying coefficients to the taps;
• and
• an adaptive step for changing the coefficients supplied by said coefficient supply step in accordance with changes in an output of the Finite Impulse Response filter, said adaptive step including a step for constraining allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said constraining step constrains the odd tap coefficients but not the even tap coefficients.

A digital data read channel, comprising:

• analog input circuitry receiving an analog input signal, the analog input circuitry including an analog-to-digital converter;
• gain control circuitry disposed to control a gain of said analog input circuitry,
• timing control circuitry disposed to control a timing of said analog-to-digital converter;
• equalizer circuitry coupled to said analog-to-digital converter and including:
• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• a coefficient supplier coupled to provide coefficients to said taps,
• wherein even tap coefficients are grouped into a plurality of groups of even tap coefficients and odd tap coefficients are grouped into a plurality of groups of odd tap coefficients;
• and
• adaptive circuitry coupled to change the coefficients s supplied by said coefficient supplier in accordance with changes in an output of the Finite Impulse Response filter, said adaptive circuitry including circuitry coupled to constrain allowable changes in both the even coefficients C0, C2, C4, C6 in at least one of the plurality of groups of even tap coefficients and in the odd coefficients C1, C3, C5 in at least one of the plurality of groups of odd tap coefficients,
• wherein a change in tap coefficients in a group of tap coefficients is independent of changes in tap coefficients in other groups of tap coefficients;
• and
• a decoder coupled to an output of said equalizer circuitry.

A digital data read channel, comprising:

• analog input circuitry receiving an analog input signal, the analog input circuitry including an analog-to-digital converter;
• gain control circuitry disposed to control a gain of said analog input circuitry,
• timing control circuitry disposed to control a timing of said analog-to-digital converter;
• equalizer circuitry coupled to said analog-to-digital converter and including:
• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6,
• a coefficient supplier coupled to provide coefficients to said taps;
• and
• adaptive circuitry coupled to change the coefficients s supplied by said coefficient supplier in accordance with changes in an output of the Finite Impulse Response filter, said adaptive circuitry including circuitry coupled to constrain allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said adaptive circuitry constrains the even coefficients such that C2 and C4 change by substantially the same amount;
• and
• a decoder coupled to an output of said equalizer circuitry.

A digital data read channel, comprising:

• analog input circuitry receiving an analog input signal, the analog input circuitry including an analog-to-digital converter;
• gain control circuitry disposed to control a gain of said analog input circuitry,
• timing control circuitry disposed to control a timing of said analog-to-digital converter;
• equalizer circuitry coupled to said analog-to-digital converter and including:
• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• a coefficient supplier coupled to provide coefficients to said taps;
• and
• adaptive circuitry coupled to change the coefficients s supplied by said coefficient supplier in accordance with changes in an output of the Finite Impulse Response filter, said adaptive circuitry including circuitry coupled to constrain allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said adaptive circuitry constrains C1, C3, and C5 by application of a constant orthogonal projection matrix,
• wherein said adaptive circuitry constrains the odd tap coefficients such that C1 and C5 are coupled;
• and
• a decoder coupled to an output of said equalizer circuitry.

A digital data read channel, comprising:

• analog input circuitry receiving an analog input signal, the analog input circuitry including an analog-to-digital converter;
• gain control circuitry disposed to control a gain of said analog input circuitry,
• timing control circuitry disposed to control a timing of said analog-to-digital converter;
• equalizer circuitry coupled to said analog-to-digital converter and including:
• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6,
• a coefficient supplier coupled to provide coefficients to said taps, and
• adaptive circuitry coupled to change the coefficients s supplied by said coefficient supplier in accordance with changes in an output of the Finite Impulse Response filter, said adaptive circuitry including circuitry coupled to constrain allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said adaptive circuitry constrains the even tap coefficients but not the odd tap coefficients;
• and
• a decoder coupled to an output of said equalizer circuitry.

A digital data read channel, comprising:

• analog input circuitry receiving an analog input signal, the analog input circuitry including an analog-to-digital converter;
• gain control circuitry disposed to control a gain of said analog input circuitry,
• timing control circuitry disposed to control a timing of said analog-to-digital converter;
• equalizer circuitry coupled to said analog-to-digital converter and including:
• an adaptive Finite Impulse Response filter having taps C0, C1, C2, C3, C4, C5, and C6;
• a coefficient supplier coupled to provide coefficients to said taps;
• and
• adaptive circuitry coupled to change the coefficients s supplied by said coefficient supplier in accordance with changes in an output of the Finite Impulse Response filter, said adaptive circuitry including circuitry coupled to constrain allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said adaptive circuitry constrains the odd tap coefficients but not the even tap coefficients;
• and
• a decoder coupled to an output of said equalizer circuitry.

A digital data read channel, comprising:

• analog input circuitry receiving an analog input signal, the analog input circuitry including as analog-to-digital converter;
• gain control circuitry disposed to control a gain of said analog input circuitry;
• timing control circuitry disposed to control a timing of said analog-to-digital converter;
• equalizer circuitry coupled to said analog-to-digital converter and including:
• an adaptive Finite Impulse Response filter having taps C0;
• C1, C2, C3, C4, C5, and C6;
• coefficient supply means for providing coefficients to said taps,
• wherein even tap coefficients are grouped into a plurality of groups of even tap coefficients and odd tap coefficients are grouped into a plurality of groups of odd tap coefficients;
• and
• adaptive means for changing the coefficients supplied by said coefficient supply means in accordance with changes in an output of the Finite Impulse Responses filter, said adaptive means including constraining means for constraining allowable changes in both the even coefficients C0, C2, C4, C6 in at least one of the plurality of groups of even tap coefficients and in the odd coefficients C1, C3, C5 in at least one of the plurality of groups of odd tap coefficients,
• wherein a change in tap coefficients in a group of tap coefficients is independent of changes in tap coefficients in other groups of tap coefficients;
• and
• a decoder coupled to an output of said equalizer circuitry.

A digital data read channel, comprising:

• analog input circuitry receiving an analog input signal, the analog input circuitry including as analog-to-digital converter;
• gain control circuitry disposed to control a gain of said analog input circuitry.
• timing control circuitry disposed to control a timing of said analog-to-digital converter;
• equalizer circuitry coupled to said analog-to-digital converter and including:
• an adaptive Finite Impulse Response filter having taps CO;
• C1, C2, C3, C4, C5, and C6;
• coefficient supply means for providing coefficients to said taps;
• and
• adaptive means for changing the coefficients supplied by said coefficient supply means in accordance with changes in an output of the Finite Impulse Responses filter, said adaptive means including constraining means for constraining allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said constraining means constrains the even tap coefficients such that C2 and C4 change by substantially the same amount;
• and
• a decoder coupled to an output of said equalizer circuitry.

A digital data read channel, comprising:

• analog input circuitry receiving an analog input signal, the analog input circuitry including as analog-to-digital converter;
• gain control circuitry disposed to control a gain of said analog input circuitry
• timing control circuitry disposed to control a timing of said analog-to-digital converter;
• equalizer circuitry coupled to said analog-to-digital converter and including:
• an adaptive Finite Impulse Response filter having taps C0;
• C1, C2, C3, C4, C5, and C6;
• coefficient supply means for providing coefficients to said taps;
• and
• adaptive means for changing the coefficients supplied by said coefficient supply means in accordance with changes in an output of the Finite Impulse Responses filter, said adaptive means including constraining means for constraining allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5
• wherein said constraining means constrains C1, C3, and C5 by application of a constant orthogonal projection matrix,
• wherein said constraining means constrains the odd tap coefficients such that C1 and C5 are coupled;
• and
• a decoder coupled to an output of said equalizer circuitry.

A digital data read channel, comprising:

• analog input circuitry receiving an analog input signal, the analog input circuitry including as analog-to-digital converter;
• gain control circuitry disposed to control a gain of said analog input circuitry
• timing control circuitry disposed to control a timing of said analog-to-digital converter,
• equalizer circuitry coupled to said analog-to-digital converter and including:
• an adaptive Finite Impulse Response filter having taps C0;
• C1, C2, C3, C4, C5, and C6;
• coefficient supply means for providing coefficients to said taps;
• and
• adaptive means for changing the coefficients supplied by said coefficient supply means in accordance with changes in an output of the Finite Impulse Responses filter, said adaptive means including constraining means for constraining allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said constraining means constrains the even tap coefficients but not the odd tap coefficients;
• and
• a decoder coupled to an output of said equalizer circuitry.

A digital data read channel, comprising:

• analog input circuitry receiving an analog input signal, the analog input circuitry including as analog-to-digital converter;
• gain control circuitry disposed to control a rain of said analog input circuitry
• timing control circuitry disposed to control a timing of said analog-to-digital converter;
• equalizer circuitry coupled to said analog-to-digital converter and including:
• an adaptive Finite Impulse Response filter having taps C0;
• C1, C2, C3, C4, C5, and C6;
• coefficient supply means for providing coefficients to said taps;
• and
• adaptive means for changing the coefficients supplied by said coefficient supply means in accordance with changes in an output of the Finite Impulse Responses filter, said adaptive means including constraining means for constraining allowable changes in both the even coefficients C0, C2, C4, C6 and in the odd coefficients C1, C3, C5,
• wherein said constraining means constrains the odd tap coefficients but not the even tap coefficients;
• and
• a decoder coupled to an output of said equalizer circuitry.

A computer readable storage medium storing code which causes a processor to constrain tap coefficients in an adaptive filter, the code causing the processor to perform the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive filter,
• wherein the at least two even tap coefficients are grouped into a plurality of groups of even tap coefficients and the at least two odd tap coefficients are grouped into a plurality of groups of odd tap coefficients;
• and
• selectively constraining changes in the values of at least one of (i) even tap coefficients in at least one of the plurality of groups of even tap coefficients and (ii)
• odd tap coefficients in at least one of the plurality of groups of odd tap coefficients,
• wherein a change in value of tap coefficients in a group of tap coefficients is independent of changes in values of tap coefficients in other groups of tap coefficients.

A computer readable storage medium storing code which causes a processor to constrain tap coefficients in an adaptive filter, the code causing the processor to perform the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients;
• and
• sub-sampling an adaptive filter output signal to provide to said constraint step sub-samples of the adaptive filter output signal.

A computer readable storage medium storing code which causes a processor to constrain tap coefficients in an adaptive filter, the code causing the processor to perform the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein the code causes said constraining step to constrain the even tap coefficients such that C0−C2+C4−C6=0,
• wherein the code causes said constraining step to constrain the even tap coefficients such that C2 and C4 are coupled.

A computer readable storage medium storing code which causes a processor to constrain tap coefficients in an adaptive filter, the code causing the processor to perform the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein the code causes said constraining step to constrain the even tap coefficients such that C0−C2+C4−C6=0,
• wherein the code causes said constraining step to constrain the even tap coefficients such that C2 and C4 are coupled, and such that C0 and C6 are coupled.

A computer readable storage medium storing code which causes a processor to constrain tap coefficients in an adaptive filter, the code causing the processor to perform the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein the code causes said constraining step to constrain the even tap coefficients such that C0−C2+C4−C6=0,
• wherein the code causes said constraining step to constrain the even tap coefficients such that C0, C2, C4, and C6 are coupled.

A computer readable storage medium storing code which causes a processor to constrain tap coefficients in an adaptive filter, the code causing the processor to perform the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein the code causes said constraining step to constrain the odd tap coefficients such that C1−C3+C5=a constant,
• wherein the code causes said constraining step to constrain the odd tap coefficients such that C1 and C5 are coupled.

A computer readable storage medium storing code which causes a processor to constrain tap coefficients in an adaptive filter, the code causing the processor to perform the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein the code causes said constraining step to constrain the even tap coefficients but not the odd tap coefficients.

A computer readable storage medium storing code which causes a processor to constrain tap coefficients in an adaptive filter, the code causing the processor to perform the steps of:

• supplying least two even tap coefficients and at least two odd tap coefficients to the adaptive filter;
• and
• selectively constraining changes in the values of at least one of (i) the two even tap coefficients and (ii) the two odd tap coefficients,
• wherein the code causes said constraining step to constrain the odd tap coefficients but not the even tap coefficients.

A computer readable storage medium storing code which causes a processor to constrain adaptation coefficients in an equalizer, the code causing the processor to perform the steps of:

• a sub-sampling step for outputting sub-samples of equalizer output signals;
• a quantizing step for outputting quantized, sub-sampled output signals;
• and
• a constraining step for constraining the adaptation coefficients of the equalizer by applying a constant orthogonal projection matrix to the quantized, sub-sampled output signals.

A computer readable storage medium according to claim, 129, wherein the code further comprises a selecting step for selecting among the following constraint modes:

• where C1, C3, and C5 are coupled;
• where C1 and C5 are coupled;
• where C2 and C4 are coupled;
• where C2, C4 are coupled and where C0 and C6 are coupled;
• and
• where C0, C2, C4, and C6 are coupled.