Digitally controlled variable offset amplifier
AssigneeIntel Corporation
InventorsBryan K. Casper, James E. Jaussi
Life of this patent
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Abstract
First and second differential transistor pairs, where each may be intentionally unbalanced or balanced, are provided. First and second digitally variable current generators are coupled to control respective tail currents of the first and second differential pairs. A switch circuit may be coupled to equalize the voltages of the respective tail current nodes. A common mode feedback circuit is also described, to improve common mode rejection of the overall amplifier. Applications of the amplifier circuit include sense amplifiers and comparators.
Claims12
An amplifier circuit comprising:
- first and second differential transistor pairs, each pair having first and second output nodes, the first output node of the first pair being coupled to the second output node of the second pair, the second output node of the first pair being coupled to the first output node of the second pair;
- and
- first and second digitally controllable variable current generators, each having a plurality of cells all coupled in parallel to each other to provide the respective tail currents of the first arid second differential pairs, each cell having a) a first input to receive a bias signal to set an output current, and b) a second input to receive an on/off control signal to turn on and turn off the output current.
A computer-implemented method for designing an amplifier circuit, comprising:
- creating a representation of first and second differential transistor pairs each being intentionally unbalanced, each pair having first and second output nodes, the first output node of the first pair being coupled to the second output node of the second pair, the second output node of the first pair being coupled to the first output node of the second pair, a latch circuit coupled to the first and second output nodes;
- and
- creating a representation of first and second digitally controllable variable current generators each having a plurality of cells all coupled in parallel to each other to provide the respective tail currents of the first and second differential pairs, each cell having a) a first input to receive a bias signal to set an output current, and b) a second input to receive an on/off control signal to turn on and turn off the output current.
Dependencies are inferred from the claim text.