Tester channel to multiple IC terminals

An apparatus for providing signal paths between integrated circuit (IC) tester channels and input pads and output pads residing on surfaces of a plurality of ICs, wherein the ICs are adapted to receive test signals via the input pads and to generate output signals at the output pads in response to the test signals, and wherein voltages of the test signals and the output signals represent logic states, the apparatus comprising:

• at least one substrate having a surface;
• a first circuit node formed on said at least one substrate;
• N first conductive pads formed on said surface, where N is an integer greater than 1;
• N first probes, each first probe linking a separate one of N of said output pads to a corresponding one of the N first conductive pads;
• and
• N first signal paths, each linking a corresponding one of the N first conductive pads to said first circuit node such that a first signal is produced at the first circuit node in response to a set of N output signals generated at the output pads linked to the first circuit node, all N first signal paths have substantially differing resistances such that a voltage of the first signal has a unique magnitude for each unique combination of logic states of the set of N output signals.

An apparatus for testing integrated circuit (ICs), wherein the ICs have input pads at which the ICs receive test signals, and have output pads at which they produce output signals in response to the test signals, the test and output signals having voltages representing logic states, the apparatus comprising:

• a first circuit node;
• N first signal paths, wherein N is an integer greater than one, wherein each first signal path links a separate one of the output pads to the first circuit node, and wherein each first signal path has a resistance differing substantially from a resistance of any other of the first signal paths, such that a first signal appears at the first circuit node having a first voltage representing a combination of logic states of the output signals produced by the output pads linked by the first signal paths to the first circuit node;
• and
• a first IC tester channel linked to the first circuit node including means for measuring the first voltage of the first signal.

A method for testing at least one integrated circuit (IC) device wherein at least one IC device comprises a plurality of terminals at which said at least one IC device receives input signals and concurrently produces output signals, wherein voltages of the input and output signals represent logic states, the method comprising the steps of:

• a. providing a first circuit node;
• b. providing a plurality of first signal paths, each first signal path linking a separate one of the plurality of terminals to the first circuit node, such that a first signal is produced at the first circuit node in response to IC output signals concurrently generated at each of the plurality of IC terminals, wherein all first signal paths have substantially differing resistances such that a voltage of the first signal produced at the first circuit node has a unique magnitude for each unique combination of logic states of the IC output signals produced at the plurality of IC terminals;
• c. measuring a voltage of the first signal produced at the first circuit node;
• and
• d. determining a logic state of each of the plurality of output signals from the voltage measured at step c.