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AssigneeLinear Technology Corporation
InventorMichael Keith Mayes
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Circuits and methods for a delta-sigma analog-to-digital converter having a variable oversample ratio to produce a constant fullscale output at reduced circuit complexity, die area, and power dissipation are provided. The circuits and methods consist of scaling the digital input to the digital filter with a decoder whose size depends on the number of oversample ratios allowed by the analog-to-digital converter. The digital filter is implemented as a comb filter having a cascade of N integrators and N differentiators, where N is the order of the digital filter. The size of the differentiators is equal to the number of bits used as output for the analog-to-digital converter, which is smaller than the size of the integrators and the number of bits produced by the digital filter.
A method for producing a digital output in a delta-sigma analog-to-digital converter having a variable oversample ratio, the method comprising:
A delta-sigma analog-to-digital converter circuit having a variable oversample ratio, the circuit comprising:
A delta-sigma analog-to-digital converter having a variable oversample ratio, the converter comprising:
Dependencies are inferred from the claim text.