Efficient model order reduction via multi-point moment matching
AssigneeNorthwestern University
InventorYehea I. Ismail
Life of this patent
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Abstract
A method for mapping moments in a reduced order system of approximation order q for use in simulating a circuit or system having n state variables at n nodes, the circuit or system having I inputs. The method includes calculating only q+I moments, where q is the approximation order and I is the number of inputs of the circuit or system being simulated, sorting the state variables at the n nodes, selecting q nodes of the n nodes, and calculating the dominate poles and zeros using a multi-point moment matching algorithm to simultaneously match q+I moments at the selected q nodes of the circuit or system. In one embodiment, the method includes using extra dummy inputs such that the total number of inputs equals I, such that K*I>q where K is a constant having a value in the range of about 4 to 8.
Claims12
A method for simulating at least linear circuits and systems using a reduced order model, the circuit or system having n state variables at n nodes, said method comprising the steps of:
- transforming a circuit description of the interconnect circuit into an equivalent DC circuit;
- converting the equivalent DC circuit into a directed graph;
- constructing a spanning tree from the directed graph;
- and, after the directed graph and spanning tree have been constructed, traversing the spanning tree to generate a set of q+I circuit moments at q nodes of the circuit or system, where q is the approximation order and I is the number of inputs of the circuit or system;
- mapping the circuit moments to dominant time constants using a multi-point moment matching algorithm to simultaneously match the q+I moments at q nodes of the circuit or system;
- and
- using the reduced order system to calculate a simulation.
Dependencies are inferred from the claim text.