Method and apparatus for testing semiconductor devices
AssigneeAdvantest Corporation
InventorTakeo Miura
Life of this patent
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Abstract
Data output from a semiconductor device under test and a reference clock output therefrom in synchronization with the data are sampled by slightly phased-apart multiphase strobe pulses. The phases of points of change of the output data and the reference clock are obtained from the sampled outputs, then the phase difference between them is measured, and a check is made to determine if the phase difference falls within a predetermined range, thereby evaluating the semiconductor device under test on a pass/fail basis.
Claims24
A semiconductor device testing method which evaluates a semiconductor device under test by obtaining the phase differences between points of change of data output from said semiconductor device under test and points of change of reference clock output in synchronization with said output data, said method comprising the steps of:
- generating multiphase strobe pulses phased apart one after another with respect to a predetermined phase position of each test cycle;
- sampling said reference clock by using said multiphase strobe pulses to obtain sampled outputs;
- and
- detecting the phases of the points of change of said reference clock from said sampled outputs.
A semiconductor device testing method which evaluates a semiconductor device under test by obtaining the phase differences between points of change of data output from said semiconductor device under test and points of change of reference clock output in synchronization with said output data, said method comprising the steps of:
- premeasuring, for each test cycle, the phases of the points of changes of said reference clock and storing said premeasured phases in a memory at addresses corresponding to said each test cycle;
- and
- obtaining, for each test cycle, said phase differences by reading out the phases from said memory at the addresses corresponding to said each test cycle to determine a reference phase for said evaluation.
A semiconductor device testing apparatus which evaluates a semiconductor device under test by obtaining the phase differences between points of change of data output from said semiconductor device under test and points of change of a reference clock output from said semiconductor device under test in synchronization with said output data, said apparatus comprising:
- a multiphase pulse generator for generating phased-apart multiphase strobe pulses;
- a plurality of reference signal readout circuits each for sampling said reference clock by a different one of said multiphase strobe pulses;
- and
- reference phase number output means supplied with the outputs from said plurality of reference signal readout circuits, for outputting the phase numbers of said multiphase strobe pulses immediately following the points of change of said reference clock as the phases of the points of change of said reference clock.
Dependencies are inferred from the claim text.