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AssigneeInternational Business Machines Corporation
InventorGeorge W. Wilhelm, Jr.
Estimating the term…
Tamper resistance is provided to avoid observation of the behavior of portions of software by calling a function exclusively available in one differentiated section of a processor and its peripherals and drivers from another differentiated section. A pseudo-random binary sequence generator is associated with each such differentiated section and incremented incident to the calling and performance of the function, respectively. The pseudo-random binary sequence values are compared prior to allowing or preventing further execution of the software. The comparison can be performed at any privilege level and a variation of the invention provides additional security by utilizing an additional privileged function to perform the comparison. An enhancement of the invention corrupts data or program files using a PRBS value at one privilege level and performs the inverse function to restore the data or program files at another privilege level with its own PRBS value.
A method for providing tamper resistance in software running on a processor having differentiated sections, said differentiated sections having respective pseudo-random binary sequence (PRBS) generators configured to incrementally provide the same pseudo-random binary sequence, one differentiated section being capable of performing a function not available on another differentiated section, said method comprising the steps of
A method for providing tamper resistance in software running on a processor having differentiated sections, said differentiated sections having respective pseudo-random binary sequence generators configured to incrementally provide the same pseudo-random binary sequence, one differentiated section being capable of performing a function not available on another differentiated section, said method comprising the steps of
A stored program for controlling a processor having differentiated sections, said differentiated sections having respective pseudo-random binary sequence generators configured to incrementally provide the same pseudo-random binary sequence, one differentiated section being capable of performing a function not available on another differentiated section, containing commands for causing said processor to perform the steps of
A stored program for controlling a processor having differentiated sections, said differentiated sections having respective pseudo-random binary sequence generators configured to incrementally provide the same pseudo-random binary sequence, one differentiated section being capable of performing a function not available on another differentiated section, said stored program containing commands for causing said processor to perform the steps of
Dependencies are inferred from the claim text.