Fabrication method of semiconductor integrated circuit device
AssigneeRenesas Technology Corp.
InventorMichiyuki Shimizu
Life of this patent
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Abstract
To reduce the manufacturing time in a production line for a semiconductor integrated circuit device, plural wafers in a lot are divided into a number of groups according to a selected number of manufacturing devices to be used for further processing of the wafers. Each group of wafers is allocated to a respective one of plural manufacturing devices in a state in which each group is housed in a respective one of plural division carriers and one sheet processing is applied to the wafer groups in the plural manufacturing devices in parallel.
Claims32
A fabrication method of a semiconductor integrated circuit device, comprising the steps of:
- (a) carrying a plurality of wafers housed in a first carriage container to a sorter from a preceding manufacturing process;
- (b) dividing the wafers in the first carriage container into a plurality of second carriage containers in the sorter, at least one of the second carriage containers housing a plurality of wafers;
- (c) carrying respectively the divided wafers in the second carriage containers to a plurality of single wafer processing apparatuses performing identical processes to the wafers;
- and
- (d) taking out the wafers from the second carriage containers, and respectively housing them into the plurality of single wafer processing apparatuses to perform the identical processes to the wafers in parallel.
A fabrication method of a semiconductor integrated circuit device, comprising the steps of:
- (a) carrying a plurality of wafers to a sorter from a preceding manufacturing process in a state that they are housed in a first carriage container;
- (b) dividing the wafers in the first carriage container into a plurality of second carriage containers in the sorter, at least one of the second carriage containers housing a plurality of wafers;
- (c) carrying respectively the divided wafers in the second carriage containers to a plurality of single wafer processing apparatuses performing identical processes to the wafers;
- (d) taking out the wafers housed in each of the second carriage containers and introducing them into corresponding one of the single wafer processing apparatuses;
- and
- (e) processing the wafers in the single wafer processing apparatuses in parallel.
A fabrication method of a semiconductor integrated circuit device, comprising:
- (a) a first manufacturing process for manufacturing a semiconductor integrated circuit device;
- (b) a second manufacturing process for manufacturing the semiconductor integrated circuit device;
- and
- (c) an intermediate process between the first and second manufacturing processes for carrying a plurality of wafers in a state that they are housed in a first carriage container in a sorter
- (d) dividing the wafers in the first carriage container into a plurality of second carriage containers in the sorter, at least one of the second carriage containers housing a plurality of wafers;
- (e) carrying respectively the divided wafers in the second carriage containers to a plurality of single wafer processing apparatuses performing identical processes to the wafers;
- and
- (f) taking out the wafers housed in each of the second carriage containers and introducing them into corresponding one of the single wafer processing apparatuses in parallel.
Dependencies are inferred from the claim text.