Low power long code synchronization scheme for sleep mode operation of CDMA systems

A method for conserving power supplied to a linear feedback shift register (LFSR) long code (LC) generator, wherein the LC generator is a Galois LC generator, a length of time between pre-assigned time slots is selected from a plurality of time periods, where said method comprises the steps of:

• operating the Galois LC generator during pre-assigned time slots;
• shutting off the Galois LC generator during standby periods between the pre-assigned time slots, a length of time between pre-assigned time slots selected from a plurality of time periods;
• and
• priming starting states of the Galois LC generator with a second generator for synchronization with pre-assigned time slots following a standby period by:
• operating a Fibonacci LFSR configured to compute an output sequence identical to an output sequence of the Galois LC generator;
• providing a plurality of masked outputs of the Fibonacci LFSR wherein the masked outputs correspond to different advanced states of the Galois LC LFSR, each of the plurality of time periods having a corresponding said masked output;
• selecting a masked output corresponding to the selected length of time between assigned time slots;
• buffering the selected masked output of the Fibonacci LFSR;
• and
• using the buffered, selected masked output of the Fibonacci LFSR to prime the Galois LC for synchronization with the pre-assigned time slots following the standby periods.

A power-conserving long-code synchronizer, said synchronizer comprising a linear feedback shift register (LFSR) long code (LC) generator and a priming generator, wherein said LC generator is a Galois LC generator, and said priming generator comprises a Fibonacci LFSR generator configured to compute an output sequence identical to an output sequence of the Galois LC generator, said Fibonacci LFSR generator having at least one mask and a buffer, said at least one mask being configured to produce an output corresponding to an advanced state of said Galois LC generator, said synchronizer configured to:

• operate said LC generator during pre-assigned time slots;
• shut off said LC generator during standby periods between the pre-assigned time slots;
• and
• prime said LC generator with a starting state with the buffer of said Fibonacci LFSR generator for synchronization with pre-assigned time slots following a standby period with a masked output of said priming generator, said synchronizer further configured to:
• operate said Fibonacci LFSR generator;
• buffer a masked output of the Fibonacci LFSR, wherein the masked output corresponds to an advanced state of the Galois LC generator;
• and
• use the buffered masked output to prime the Galois LC generator for synchronization with the pre-assigned time slots following the standby periods.

A power-conserving long-code synchronizer, said synchronizer comprising a linear feedback shift register (LFSR) long code (LC) generator and a priming generator, said LC generator is a Galois LC generator, and said priming generator comprises a Fibonacci LFSR generator configured to compute an output sequence identical to an output sequence of said Galois LC generator, said Fibonacci LFSR Generator having a plurality of masks and corresponding buffers, each said mask being configured to produce an output corresponding to an advanced state of said Galois LC generator, said synchronizer configured to:

• operate said LC generator during pre-assigned time slots;
• shut off said LC generator during standby periods between the pre-assigned time slots;
• and
• prime said LC generator with a starting state for synchronization with pre-assigned time slots following a standby period with a masked output of said priming generator, wherein a length of time between pre-assigned time slots is selected from a plurality of time periods and each said time period has a corresponding masked output, said synchronizer further configured to:
• operate said Fibonacci LFSR generator;
• select a masked output corresponding to the selected length of time between assigned time slots;
• buffer the selected masked output of the Fibonacci LFSR;
• and
• use the buffered, selected masked output to prime said Galois LC generator for synchronization with the pre-assigned time slots following the standby periods.